Fishing – trapping – and vermin destroying
Patent
1985-07-31
1987-12-22
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437193, 437186, H01L 21283, H01L 21308
Patent
active
047146869
ABSTRACT:
A method for forming doped, conductive plugs to fill and planarize contact windows in integrated circuits is disclosed. The process is applicable to CMOS, NMOS and bipolar technologies. Discrete, sized, contact apertures formed superposing junction regions of a substrate are filled with semiconductor material and the semiconductor material is doped to match the conductivity type of the underlying junction regions. Thus, the integrated circuit structure is substantially planarized for formation of interconnect layers.
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Sander Craig S.
Swaminathan Balaji
Advanced Micro Devices , Inc.
Hearn Brian E.
King Patrick T.
Quach T. N.
Taylor John P.
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