Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to conductive state
Reexamination Certificate
2007-06-05
2007-06-05
Le, Thao X. (Department: 2814)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to conductive state
C438S270000, C438S243000, C438S600000, C257SE23147
Reexamination Certificate
active
11055106
ABSTRACT:
An anti-fuse structure that can be programmed at low voltage and current and which potentially consumes very little chip spaces and can be formed interstitially between elements spaced by a minimum lithographic feature size is formed on a composite substrate such as a silicon-on-insulator wafer by etching a contact through an insulator to a support semiconductor layer, preferably in combination with formation of a capacitor-like structure reaching to or into the support layer. The anti-fuse may be programmed either by the selected location of conductor formation and/or damaging a dielectric of the capacitor-like structure. An insulating collar is used to surround a portion of either the conductor or the capacitor-like structure to confine damage to the desired location. Heating effects voltage and noise due to programming currents are effectively isolated to the bulk silicon layer, permitting programming during normal operation of the device. Thus the potential for self-repair without interruption of operation is realized.
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Bertin Claude L.
Divakaruni Ramachandra
Houghton Russell J.
Mandelman Jack A.
Tonti William R.
Canale Anthony
International Business Machines - Corporation
Le Thao X.
Whitham Curtis Christofferson & Cook PC
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