Method of forming complementary bipolar and MOS transistor havin

Fishing – trapping – and vermin destroying

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437 32, 437 33, 437 51, 148DIG9, 257368, H01L 2100, H01L 2102, H01L 2122, H01L 2126

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052565823

ABSTRACT:
The present invention relates to a method of manufacturing a semiconductor integrated device and, more particularly, to a semiconductor integrated device having NPN and PNP power and logic devices combined with complementary MOS and DMOS devices. The present invention is a multipitaxial process for fabricating a high power/logic complementary bipolar/MOS/DMOS (CBiCMOS) integrated circuit. The process steps for fabricating the novel integrated circuit combines on the same substrate complementary high power, logic/analog bipolar transistors with complementary MOSGVm devices and DMOSFET devices. The present invention optimizes the characteristics of these different transistors in a single process flow. The present high power/logic CBiCMOS multiepitaxial process results in device structures having distinct technical advantages over prior art processes and structures heretofore known. For example, the present integrated circuit chip, uses bipolar power transistors instead of vertical DMOS power transistors for power applications. The bipolar power transistors are more rugged and have higher power handling capabilities than DMOS devices. Thus the bipolar transistors can be used for any out-stage configuration, including low side, high side, half bridge and full bridge output circuits. The versatility of the present process flow allows the fabrication of MOSFET, BiMOS, BiCMOS, and bipolar technology either discretely or with high power or low power NPN or PNP devices.

REFERENCES:
patent: 4475279 (1984-10-01), Gahle
patent: 4727046 (1988-02-01), Tuntasood et al.
patent: 4799098 (1989-01-01), Ikeda et al.
patent: 4806499 (1989-02-01), Shinohara
Cole, B., Is BiCMOS the Next Technology Driver, Electronics, Feb. 4, 1988, pp. 55-67.

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