Metal working – Barrier layer or semiconductor device making – Barrier layer device making
Patent
1997-02-07
1998-01-13
Niebling, John
Metal working
Barrier layer or semiconductor device making
Barrier layer device making
H01G 915
Patent
active
057074070
ABSTRACT:
A chip-formed solid electrolytic capacitor having a structure wherein a projecting anode lead is not provided for an anode member. The solid electrolytic capacitor is fabricated by the following manner: First, an electrically insulating resin such as a fluororesin is impregnated into an end face of a porous electrode member to form an insulating resin impregnated portion, and an electrode lead member is bonded to the anode member at the insulating resin impregnated portion. An anodic oxidation film, a solid electrolyte layer and a cathode layer successively are formed on the anode member. Then, an electrically insulating outer package is applied so that the cathode layer on a face of the anode member opposing to the face on which the electrode lead member is mounted is exposed. After removing the electrode lead member, an anode outer electrode layer is formed on the insulating resin impregnated portion, and a cathode outer electrode layer which electrically connects to the cathode layer is formed on the end face of the anode member opposing to the anode outer electrode layer.
REFERENCES:
patent: 5036434 (1991-07-01), Kobayashi
patent: 5349496 (1994-09-01), Taniguchi et al.
patent: 5390074 (1995-02-01), Hasegawa et al.
Kobayashi Atushi
Ohi Masashi
Taniguchi Hiromichi
Bilodeau Thomas G.
NEC Corporation
Niebling John
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