Method of forming capacitors and interconnect lines

Fishing – trapping – and vermin destroying

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437 52, H01L 2170

Patent

active

057417210

ABSTRACT:
A multi-region material structure and process for forming capacitors and interconnect lines for use with integrated circuits provides (1) capacitor first or bottom electrodes comprising a transition-metal nitride; (2) a capacitor dielectric comprising a transition-metal oxide; (3) capacitor second or top electrodes comprising a transition-metal nitride, a metal or multiple conductive layers; (4) one or more levels of interconnect lines; (5) electrical insulation between adjacent regions as required by the application; and (6) bonding between two regions when such bonding is required to achieve strong region-to-region adhesion or to achieve a region-to-region interface that has a low density of electrical defects. The process for forming the material structures involves formation of the capacitor dielectric on the first electrode surfaces by conversion of a conductive transition-metal nitride to an insulating transition-metal oxide and formation of low-defect-density interfaces between capacitor second electrodes and the capacitor dielectric.

REFERENCES:
patent: 4970564 (1990-11-01), Kimura et al.
patent: 5231044 (1993-07-01), Jun
patent: 5248629 (1993-09-01), Muroyama

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