Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Mesa or stacked emitter
Reexamination Certificate
2000-06-09
2002-09-17
Christianson, Keith (Department: 2813)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Mesa or stacked emitter
C438S765000, C438S770000
Reexamination Certificate
active
06451660
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the semiconductor arts. It finds particular application in relation to the fabrication of bipolar transistor structures, including Bipolar/Complementary Metal Oxide Silicon (BiCMOS) devices and other bipolar applications. It should be appreciated, however, that the invention is also applicable to the growth of high quality, thin oxide films for other applications.
BACKGROUND OF THE INVENTION
Bipolar transistors and MOSFET (metal-oxide-silicon field-effect transistor) devices represent two different types of semiconductor device which each have distinct advantages over the other. For example, bipolar transistors are well suited for use in high power, high speed, digital and analog applications. On the other hand, MOSFET transistor devices are well suited for low power and high packing density applications. These include PMOS and NMOS transistors, which are used in combination to form CMOS devices (where “N” stands for “negative,” “P” for “positive,” and “C” for “complementary”).
With the current trend toward large scale integration of semiconductor circuits, it has become advantageous to integrate bipolar circuits and MOSFET circuits in the same chip. In this manner, many MOSFET circuits can be arranged in a same wafer area and utilized to perform an electrical function, while the current driving capabilities of bipolar transistors can be used as the drivers for such MOSFET circuits.
In forming a typical bipolar transistor, an n-well is formed in a lightly doped p-type substrate, such as boron-doped silicon. The n-well is isolated by a thick field oxide or trenches, using conventional silicon processing techniques. A thin oxide layer is then grown over the surface of the wafer, covering the n-well. Openings are formed through the oxide layer to provide contacts with the intended base, collector, and emitter regions. A layer of polycrystalline silicon (hereinafter polysilicon) is deposited over the surface of the wafer and implanted with arsenic or other n-type material to form a polyemitter structure for the bipolar transistor. The n-well is patterned and implanted to form a p-type intrinsic base region. The arsenic in the polyemitter is partially out-diffused from the polyemitter to form a shallow n
+
region directly below the polyemitter. Metal contacts are formed between the collector, base region, and polyemitter.
It will be readily appreciated by those skilled in the art that the process for fabricating an actual bipolar transistor involves many more steps. These steps are well known and are described, for example, in S. M. Sze, “VLSI Technology,” 2nd. ed., New York: McGraw-Hill (1988). Additionally, other semiconductor devices, such as CMOS devices, may be formed on the substrate adjacent to the bipolar device.
The oxide layer between the silicon substrate and the polyemitter is preferably relatively thin and uniform, generally less than 20 Å in thickness. The thickness of the oxide layer controls the current gain, that is the ratio of collector current (output) to base current (input). As the thickness of the oxide layer increases, the gain increases. However, above a certain thickness, the breakdown voltage will be too low. For a given application, the tolerance in oxide layer thickness is likely to be only a few Angstroms. Accordingly, it is desirable to be able to control the thickness of the oxide layer to within a few Angstroms and to maintain reproducibility over the long term.
Currently, the method of forming the oxide layer involves first cleaning the surface of the silicon to remove impurities such as hydrocarbons, metallic and particulate contaminants, and oxides, and any oxidation on the surface, and then oxidizing the surface in a furnace at a temperature of about 540 to 610° C. The cleaning process includes a strip with hydrofluoric acid followed by rinsing in deionized water. Then the sample is dried.
The thickness of the oxide layer is affected by the temperature, time, and oxygen content in the furnace. Oxide films may grown up to 1000 angstrom in thickness, or more, within a short period of time. Thus, variations in the furnace exposure time of only a few seconds can cause the thickness oxide layer to fall outside design tolerances. Additionally, the length of time the wafer waits between cleaning and being placed in the furnace affects the thickness of the oxide film, since the oxide film grows naturally in air. Due to heavy scheduling, the furnace may not be available for forming the oxide layer for several hours after cleaning. During this time, an oxide layer of several Angstroms thickness readily forms, which is then increased in the subsequent furnace treatment. Accordingly, it is difficult to achieve reproducibility in the oxide thickness layer without careful control of each of these factors.
There remains a need for a method of forming an oxide layer of reproducible thickness, which overcomes the above-referenced problems and others.
SUMMARY OF THE INVENTION
In accordance with one aspect of the present invention, a method of forming an oxide layer on a semiconductor substrate is provided. The method includes growing an oxide layer on the substrate by exposing a surface of the substrate to ozonated water.
In accordance with another aspect of the present invention, a method of forming a bipolar device is provided. The method includes forming a collector region in a semiconductor substrate by doping the semiconductor substrate with an n-type impurity, forming a base region in the semiconductor substrate by doping the substrate with a p-type impurity, forming an oxide layer on a surface of the semiconductor substrate by immersing the substrate surface in a liquid containing sufficient ozone for the growth of the oxide layer and forming a polyemitter over the oxide layer.
One advantage of the present invention is that the process allows the formation of very thin layers of oxide of about 10-20 Angstroms in thickness, or less.
Another advantage of the present invention is that the thickness of the oxide film is uniform across a wafer.
Yet another advantage of the present invention is that oxide film thicknesses are reproducible from lot to lot.
Yet another advantage of the present invention is that formation of the polysilicon layer may be delayed if a furnace is not available for further processing.
Yet another advantage of the present invention is that the oxide layer is formed without increasing the number of processing steps.
Yet another advantage of the present invention is that a high quality uniform oxide is formed.
Yet another advantage of the present invention is that it provides a lower temperature process which allows prior formation of a CMOS device on the same chip without damage to the CMOS device during formation of the bipolar transistor.
Still further advantages of the present invention will become apparent to those of ordinary skill in the art upon reading and understanding the following detailed description of the preferred embodiments.
REFERENCES:
patent: 4962053 (1990-10-01), Spratt et al.
patent: 5661092 (1997-08-01), Koberstein et al.
patent: 5728631 (1998-03-01), Wang
patent: 5795821 (1998-08-01), Bacchetta et al.
patent: 5814562 (1998-09-01), Green et al.
patent: 5837662 (1998-11-01), Chai et al.
patent: 5908312 (1999-06-01), Cheung et al.
patent: 5940736 (1999-08-01), Brady et al.
patent: 5971368 (1999-10-01), Nelson et al.
patent: 6274506 (2001-08-01), Christenson et al.
patent: 6314974 (2001-11-01), Schuler et al.
R.S. Ridley, Sr. et al., “Advanced Aqueous Wafer Cleaning in Power Semiconductor Device Manufacturing,” 1998 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, pp. 235-242, Aug. 1998.*
T. Ohmi et al., “Native Oxide Growth and Organic Impurity Removal on Si Surface with Ozone-Injected Ultrapure Water,” J. Electrochem. Soc., vol. 40, No. 3, Mar. 1993, pp. 804-810.*
M. Meuris et al., “Implementation of the IMEC-Clean in Advanced CMOS Manufacturing,” Conference Proceedings of the 1999 IEEE International Symposium on Semiconductor Manufacturi
Campbell Timothy Scott
Chyan Yih-Feng
Leung Chung Wai
Liu Jane Qian
Ma Yi
Agere Systems Guardian Corp.
Christianson Keith
Fay, Sharpe, Fagan, Minnich & McKee, L.L.P.
Smoot Stephen W.
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