Method of forming bipolar transistor having substrate to polysil

Details Method of forming bipolar transistor having substrate to polysil Method of forming bipolar transistor having substrate to polysil

1992-02-03

1993-04-20

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437162, 148DIG10, H01L 21265, H01L 2970

Patent

active

052042774

ABSTRACT:
A bipolar transistor (10) with reduced substrate trenching and reduced base electrode size. A substrate (12) is provided with an overlying first dielectric layer (20), an overlying first conductive layer (24), an overlying second dielectric layer (26), and a doped collector region (14, 16, and 18). An opening is formed within the layers (20, 24, and 26) forming a sidewall of conductive layer (24). A doped base diffusion (28) is formed within a portion of the substrate (12) exposed by the opening. A conductive grown region (30) is formed laterally adjacent the sidewall of conductive layer (24) and overlies substrate (12). A spacer (32) is formed adjacent a first portion of the conductive grown region (30). A second portion of the conductive grown region (30) is removed forming an exposed portion of substrate (12). A second spacer (36) is formed adjacent spacer (32). A conductive layer (38), which forms a doped emitter region is formed overlying the exposed portion of substrate (12).

REFERENCES:
patent: 4980305 (1990-12-01), Kadota et al.
patent: 5028550 (1991-07-01), Hirakawa
Innovations in Silicon Deposition Technology for Advanced Device Structures, by David L. Haram et al., was partially published in Electron Device Letters, vol. 9, May 1988, pp. 259-261.
Selective Epitaxial Growth of Silicon and Some Potential Applications, by B. J. Ginsberg et al., was published in IBM Journal of Research and Development, vol. 34, No. 6, Nov. 1990, pp. 816-827.
A Novel Self-Aligned Epitaxial Base Transistor, by H. Fujimaki et al., was published and present via IEEE 1991 Bipolar Circuits and Technology Meeting 3.2, pp. 59-62 (date unknown).

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