Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2008-04-09
2010-11-09
Toledo, Fernando L (Department: 2895)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S706000, C438S736000, C438S738000
Reexamination Certificate
active
07829472
ABSTRACT:
A method of forming openings is disclosed. A substrate is first provided, and the tri-layer structure is formed on the substrate. The tri-layer structure includes a bottom photoresist layer, a silicon-containing layer and a top photoresist layer form bottom to top. Subsequently, the top photoresist layer is patterned, and the silicon-containing layer is etched by utilizing the top photoresist layer as an etching mask to partially expose the bottom photoresist layer. Next, the partially exposed bottom photoresist layer is etched through two etching steps in turn by utilizing the patterned silicon-containing layer as an etching mask. The first etching step includes an oxygen gas and at least one non-carbon-containing halogen-containing gas, while the second etching step includes at least one halogen-containing gas. The substrate is thereafter etched by utilizing the patterned bottom photoresist layer as an etching mask to form at least an opening in the substrate.
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patent: 5872045 (1999-02-01), Lou et al.
patent: 2005/0236366 (2005-10-01), Liu
patent: 2008/0032508 (2008-02-01), Chang
patent: 2008/0099435 (2008-05-01), Grimbergen
patent: 2009/0004875 (2009-01-01), Shen et al.
Chou Pei-Yu
Huang Wei-Hang
Liao Jiunn-Hsiung
Neo Kai-Siang
Hsu Winston
Margo Scott
Teng Min-Lee
Toledo Fernando L
United Microelectronics Corp.
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