Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2002-10-02
2004-01-20
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S711000, C438S723000, C438S724000, C438S743000, C438S744000
Reexamination Certificate
active
06680258
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to a method of forming an opening through an insulating layer of a semiconductor device.
BACKGROUND OF THE INVENTION
The current trend in the semiconductor industry is to make contact openings through insulating layers in semiconductor devices as small as possible to reduce the total size of the semiconductor devices. However, a smaller contact opening increases the aspect ratio of the contact. Conventional photoresist does not have enough selectivity for etching an insulating layer with an increased aspect ratio. Therefore a polysilicon or amorphous silicon hard mask, which has larger selectivity, is used in lieu of a photoresist mask to etch openings in the insulating layers. However, if the polysilicon or amorphous silicon hard mask layer is not thoroughly removed from a semiconductor device prior to filling a contact opening, a titanium silicide layer may form on the semiconductor device during the following titanium/titanium nitride (Ti/TiN) deposition or anneal process. The titanium silicide layer is hard to remove by tungsten chemical mechanical process (CMP) or tungsten etch back, and the remaining titanium silicide will cause a circuit short in the semiconductor device, thereby degrading its performance.
Accordingly, there is a need for an improved method of forming a contact opening in an insulating layer using a polysilicon or amorphous silicon hard mask layer.
SUMMARY OF THE INVENTION
In accordance with the invention, there is provided a method of forming at least one opening through an insulating layer of a semiconductor device, wherein the insulating layer is between a first layer and a second layer. The method comprises forming the insulating layer on the first layer; forming a polysilicon or amorphous silicon hard mask layer as the second layer; forming a patterning layer having at least one opening; etching the polysilicon or amorphous silicon hard mask layer using the patterning layer as a mask to form at least one opening through the polysilicon or amorphous silicon hard mask layer; etching the insulating layer using the etched polysilicon or amorphous silicon hard mask layer as a mask to form the at least one opening through the insulating layer; and nitridizing the etched polysilicon or amorphous silicon hard mask layer.
Advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the appended claims.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
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Tsai Yuan-Li
Wang Yu-Piao
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
ProMOS Technologies Inc.
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