Method of forming an integrated circuit structure with fully-enc

Details Method of forming an integrated circuit structure with fully-enc Method of forming an integrated circuit structure with fully-enc

1978-05-10

1979-09-25

Dean, R.

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

29576W, 29580, 29589, 148175, 156645, 156648, 156659, 156662, 357 49, 357 50, 357 55, H01L 21306, H01L 2176

Patent

active

041690001

ABSTRACT:
A method for forming a fully-enclosed air isolation structure which comprises etching a pattern of cavities extending from one surface of a silicon substrate into the substrate to laterally surround and electrically isolate said plurality of substrate pockets, and then forming a first layer of silicon dioxide on said first substrate surface. Next, a planar second layer comprising silicon dioxide is formed over a second silicon substrate, after which this planar layer is fused to said silicon dioxide layer to thereby fully enclose said cavities. Then, the second silicon substrate is removed.

REFERENCES:
patent: 3300832 (1967-01-01), Cave
patent: 3332137 (1967-07-01), Kenney
patent: 3341743 (1967-09-01), Ramsey
patent: 3343255 (1967-09-01), Donovan
patent: 3381369 (1968-05-01), Stoller
patent: 3489961 (1970-01-01), Frescura et al.
patent: 3689992 (1972-09-01), Schutze et al.
patent: 3787710 (1974-01-01), Cunningham

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