Method of forming an integrated circuit region through the combi

Details Method of forming an integrated circuit region through the combi Method of forming an integrated circuit region through the combi

1976-04-05

1977-11-29

Rutledge, L. Dewayne

Metal treatment

Compositions

Heat treating

29579, 148187, 156653, 156654, 357 91, H01L 21265, H01L 21324

Patent

active

040604276

ABSTRACT:
A region in an integrated circuit substrate is formed by first ion implanting impurities of a selected conductivity-determining type into a semiconductor substrate through at least one aperture in a masking electrically insulative layer, and then diffusing a conductivity-determining impurity of the same type through the same aperture into said substrate.
The method has particular application when the electrically insulative layer is a composite of two layers, e.g., a top layer of silicon nitride and a bottom layer of silicon dioxide and the aperture is thus a pair of registered openings respectively through said silicon nitride and silicon dioxide layers, and the aperture through the silicon dioxide layer has greater lateral dimensions than that in the silicon nitride layer to provide an undercut beneath the silicon nitride ion implantation barrier layer.

REFERENCES:
patent: 3615874 (1971-10-01), Lepselter et al.
patent: 3669760 (1972-06-01), Rein et al.
patent: 3717790 (1973-02-01), Dalton et al.
patent: 3764423 (1973-10-01), Hauser et al.
patent: 3908262 (1975-09-01), Stein
patent: 3947866 (1976-03-01), Stellrecht
Oberai, "Combined Ion Implanted-Diffusion Emitter," IBM Tech. Discl. Bull., vol. 13, No. 10, Mar. 71, p. 2828.
Bratter et al., "Ion Implanted Emitter Process --etc.," IBM Tech. Discl. Bull., vol. 18, No. 6, Nov. 75, pp. 1827, 1828.

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