Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates
Reexamination Certificate
2007-10-11
2009-10-20
Garber, Charles D. (Department: 2812)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
C438S510000, C438S514000, C438S542000, C438S558000, C438S787000, C257SE21135, C257SE21211
Reexamination Certificate
active
07605052
ABSTRACT:
A method for forming a diffused, doped backside layer on a device wafer oxide bonded to a handle wafer in an integrated circuit is provided. The method comprises forming a thermal bond oxide layer on a backside surface of the device wafer of the integrated circuit. Implanting the bond oxide with a diffusing dopant. Diffusing dopant from the bond oxide into the backside surface of the device wafer. Depositing an oxide layer on the bond oxide and bonding the deposited oxide layer to the handle wafer of the integrated circuit.
REFERENCES:
patent: 4127932 (1978-12-01), Hartman et al.
patent: 4504334 (1985-03-01), Schaake et al.
patent: 4554059 (1985-11-01), Short et al.
patent: 4771016 (1988-09-01), Bajor et al.
patent: 4774196 (1988-09-01), Blanchard
patent: 4807012 (1989-02-01), Beasom
patent: 4897362 (1990-01-01), Delgado et al.
patent: 4923821 (1990-05-01), Namose
patent: 4935386 (1990-06-01), Nakagawa et al.
patent: 5054683 (1991-10-01), Haisma et al.
patent: 5110748 (1992-05-01), Sarma
patent: 5199298 (1993-04-01), Ng et al.
patent: 5231045 (1993-07-01), Miura et al.
patent: 5261999 (1993-11-01), Pinker et al.
patent: 5270221 (1993-12-01), Garcia et al.
patent: 5360752 (1994-11-01), Brady et al.
patent: 5453405 (1995-09-01), Fan et al.
patent: 5602052 (1997-02-01), Beasom
patent: 5643821 (1997-07-01), Beasom
patent: 5658809 (1997-08-01), Nakashima et al.
patent: 5659192 (1997-08-01), Sarma et al.
patent: 5728624 (1998-03-01), Linn et al.
patent: 5782975 (1998-07-01), Linn
patent: 5801084 (1998-09-01), Beasom
patent: 5849627 (1998-12-01), Linn et al.
patent: 5882987 (1999-03-01), Srikrishnan
patent: 5882990 (1999-03-01), DeBusk et al.
patent: 5895953 (1999-04-01), Beasom
patent: 5994204 (1999-11-01), Young et al.
patent: 6057212 (2000-05-01), Chan et al.
patent: 6118181 (2000-09-01), Merchant et al.
patent: 6140210 (2000-10-01), Aga et al.
patent: 6146979 (2000-11-01), Henley et al.
patent: 6159824 (2000-12-01), Henley et al.
patent: 6191006 (2001-02-01), Mori
patent: 6211041 (2001-04-01), Ogura
patent: 6214701 (2001-04-01), Matsushita et al.
patent: 6255195 (2001-07-01), Linn et al.
patent: 6255731 (2001-07-01), Ohmi et al.
patent: 6362075 (2002-03-01), Czagas et al.
patent: 6537846 (2003-03-01), Lee et al.
patent: 6737337 (2004-05-01), Chan et al.
patent: 6784494 (2004-08-01), Mitani
patent: 6867495 (2005-03-01), Czagas et al.
patent: 6946364 (2005-09-01), Czagas et al.
patent: 0601850 (1994-06-01), None
patent: 8181321 (1996-07-01), None
patent: 9423444 (1994-10-01), None
Beasom James D.
Czagas Joseph A.
Woodbury Dustin A.
Fogg & Powers LLC
Garber Charles D.
Intersil Corporation
Roman Angel
LandOfFree
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