Method of forming an alignment mark without a specific photolith

Details Method of forming an alignment mark without a specific photolith Method of forming an alignment mark without a specific photolith

1998-05-28

2000-02-29

Utech, Benjamin

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

438694, 438975, H01L 21302

Patent

active

060308974

ABSTRACT:
An alignment mark is formed in a planar semiconductor IC structure coated by a layer opaque to the radiations of the photo-stepper used to perform a photolithographic step. First, there is provided a structure comprised of a silicon substrate (11) having at least one shallow isolation trench (17A) in the chip region (13) and one shallow alignment trench (17B') in the kerf region (14) of the substrate wherein said alignment trench has a determined width (W'). Then, a layer (18) of an insulating material is conformally deposited onto the structure. Its thickness is adequate to over fill the trenches so that depressions (18A, 18B') are created above the locations of said isolation and alignment trenches. Next, the structure is planarized by filling the depression over said isolation trench but not the depression (18B') formed over said alignment trench to preserve it. Now, the structure is uniformly etched back down to the surface of the silicon substrate transferring thereby said depression in the insulating material filling the alignment trench creating thereby a recess (22'). Finally, a layer (23) of an opaque material is conformally deposited onto the structure, which in turn produces a new depression (23B'). Said width W' is determined to have the alignment mark (22' or 23B') of the adequate size to perform the said photolithographic step.

REFERENCES:
patent: 5470782 (1995-11-01), Schwalke et al.
patent: 5733801 (1998-03-01), Gojohbori
patent: 5786260 (1998-07-01), Jang et al.
patent: 5893744 (1999-04-01), Wang
patent: 6738961 (1998-04-01), Chen

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