Method of forming a wall structure in a microelectronic...

Details Method of forming a wall structure in a microelectronic... Method of forming a wall structure in a microelectronic...

2006-11-15

2009-08-04

Thai, Luan C (Department: 2891)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Including adhesive bonding step

C438S118000, C438S116000

Reexamination Certificate

active

07569424

ABSTRACT:
A method of forming a wall structure in a microelectronic assembly includes selectively depositing a flowable material on an upper surface of a first element in the microelectronic assembly, positioning a molding surface in contact with the deposited flowable material and controlling a distance between the upper surface of the first element and the molding surface with one or more objects positioned between the upper surface and the molding surface.

REFERENCES:
patent: 6379988 (2002-04-01), Peterson et al.
patent: 6782610 (2004-08-01), Iijima et al.
patent: 6826827 (2004-12-01), Fjelstad
patent: 7288757 (2007-10-01), Farnworth et al.
patent: 2005/0116326 (2005-06-01), Haba et al.
patent: 2005/0284658 (2005-12-01), Kubota et al.
U.S. Appl. No. 60/847,504, filed Sep. 27, 2006.

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