Method of forming a trench isolation region

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

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438424, 438428, 148DIG50, H01L 2176

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active

058175687

ABSTRACT:
A method, using multi-trench formation techniques, to define the respective depths of trenches having different widths. The method includes forming a buffer oxide layer and a polishing stop layer, in sequence, above a semiconductor substrate. Then, the buffer oxide layer, the polishing stop layer and the semiconductor substrate are defined to form at least one narrow trench. Thereafter, the buffer oxide layer, the polishing stop layer and the semiconductor substrate are again defined to form at least one wide trench whose depth is less than that of the narrow trench. Alternatively, the wide trench may be etch-defined first, followed by the narrow trench. However, in both cases the depth of the wide trench will be less than that of the narrow trench. Subsequently, an oxide layer is formed, which fills the narrow and wide trenches. Next, a portion of the oxide layer and a portion of the polishing stop layer are removed to form a planarized surface. Finally, the polishing stop layer and the buffer oxide layer are removed.

REFERENCES:
patent: 5340755 (1994-08-01), Zwicknagl et al.
patent: 5397731 (1995-03-01), Takemura
patent: 5536675 (1996-07-01), Bohr
patent: 5646063 (1997-07-01), Mehta et al.
patent: 5702977 (1997-12-01), Jang et al.

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