Method of forming a step compensated semiconductor device

Details Method of forming a step compensated semiconductor device Method of forming a step compensated semiconductor device

1993-11-24

1995-10-10

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437162, 437193, 437225, 437 29, H01L 2144, H01L 2148

Patent

active

054570700

ABSTRACT:
A field insulating film and a gate insulating film are formed on the surface of a semiconductor substrate, and thereafter contact holes for a source and drain are formed in the gate insulating film. Polycrystalline Si containing impurities are deposited on the substrate and patterned to form source, gate, and drain electrode layers. The source and drain regions are formed by implanting impurity ions and doping the impurities in the source and drain electrode layers to the substrate surface. An interlayer insulating film having a flat surface is thereafter formed on the substrate, and contact holes are formed in the interlayer insulating film by selective etching. The etching depths of the contact holes are generally the same, preventing an excessive etching of the contact hole for the gate electrode.

REFERENCES:
patent: 4072545 (1978-02-01), De La Moneda
patent: 4803173 (1989-02-01), Sill et al.
patent: 4954459 (1990-09-01), Avanzino et al.
patent: 5003062 (1991-03-01), Yen
patent: 5030584 (1991-07-01), Nakata
patent: 5154946 (1992-10-01), Zdebel

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