Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2006-04-04
2006-04-04
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C257S513000
Reexamination Certificate
active
07022583
ABSTRACT:
A method of forming a shallow trench isolation device in order to prevent kick effects comprising a semiconductor structure having a patterned masking layer formed thereon. A shallow trench is formed in the semiconductor structure by using the patterned masking layer as a mask. A liner oxide layer and a doped dielectric layer are formed in sequence on the semiconductor structure to cover the surface of the shallow trench. A layer of oxide is formed on the semiconductor structure to fill the shallow trench. The dopants in the doped dielectric layer diffuse into the semiconductor structure surrounding the shallow trench to form an ion doped area, thereby increasing the threshold voltage caused by the recess on the corner structure in order to prevent the kick effect.
REFERENCES:
patent: 6118168 (2000-09-01), Moon et al.
patent: 2002/0197823 (2002-12-01), Yoo et al.
Leng DeXue
Zheng Wang
Grace Semiconductor Manufacturing Corporation
Lebentritt Michael
Stevenson Andre′ C.
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