Fishing – trapping – and vermin destroying
Patent
1993-11-23
1995-04-11
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 60, 437200, 148DIG9, H01L 21265
Patent
active
054057906
ABSTRACT:
A varactor (10, 115, 122) is formed using a BICMOS process flow. An N well (28) of a varactor region (13) is formed in an epitaxial layer (22) by doping the epitaxial layer (22) with an N type dopant. A cathode region (55, 132) is formed in the N well (28) by further doping the N well (28) with the N type dopant. Cathode electrodes (91, 114) are formed by patterning a layer of polysilicon (62, 86) over the epitaxial layer (22). Subsequently, the cathode electrodes (91, 114) are doped with an N type dopant. A region adjacent the cathode region (55, 132) is doped to form a lightly doped region (103, 117). The lightly doped region (103, 117) is doped with a P type dopant to form an anode region (109, 119).
REFERENCES:
patent: 3865649 (1975-02-01), Beasom
patent: 4377029 (1983-03-01), Ozawa
patent: 4734382 (1988-03-01), Krishna
patent: 4827319 (1989-05-01), Pavlidis et al.
patent: 4898839 (1990-02-01), Fujinuma et al.
patent: 4939099 (1990-07-01), Seacrist et al.
patent: 5013677 (1991-05-01), Hozumi
patent: 5038184 (1991-08-01), Chiang et al.
patent: 5134082 (1992-07-01), Kirchgessner
patent: 5173835 (1992-12-01), Cornett et al.
patent: 5181091 (1993-01-01), Harrington, III et al.
Costa Julio
Hwang Bor-Yuan C.
Rahim Irfan
Dover Rennie W.
Hearn Brian E.
Motorola Inc.
Nguyen Tuan
LandOfFree
Method of forming a semiconductor structure having MOS, bipolar, does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming a semiconductor structure having MOS, bipolar,, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming a semiconductor structure having MOS, bipolar, will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1538101