Method of forming a semiconductor structure having an air region

Details Method of forming a semiconductor structure having an air region Method of forming a semiconductor structure having an air region

1993-06-02

1994-06-28

Kunemund, Robert

Fishing, trapping, and vermin destroying

437235, 437238, 437927, 148DIG73, H01L 2176

Patent

active

053246837

ABSTRACT:
A method for forming an air region or an air bridge overlying a base layer (12). Air regions (20a, 20b, 28a, and 48) are formed overlying the base layer (12) to provide for improved dielectric isolation of adjacent conductive layers, provide air-isolated conductive interconnects, and/or form many other microstructures or microdevices. The air regions (20a, 20b, 28a, and 48) are formed by either selectively removing a sacrificial spacer (16a and 16b) or by selectively removing a sacrificial layer (28, 40). The air regions (20a, 20b, 28a, and 48) are sealed, enclosed, or isolated by either a selective growth process or by a non-conformal deposition technique. The air regions (20a, 20b, 28a, and 48) may be formed under any pressure, gas concentration, or processing condition (i.e. temperature, etc.). The air regions (20a, 20b, 28a, and 48) may be formed at any level within an integrated circuit.

REFERENCES:
patent: 3689992 (1972-09-01), Schutze et al.
patent: 5148260 (1990-09-01), Inoue et al.
patent: 5171713 (1992-12-01), Matthews

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