Method of forming a semiconductor device having several gate lev

Details Method of forming a semiconductor device having several gate lev Method of forming a semiconductor device having several gate lev

1986-06-12

1988-02-09

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 53, 437191, 437195, 437233, H01L 3118

Patent

active

047242183

ABSTRACT:
The invention provides a method for forming a semiconductor device having several gate levels, which, in the case of forming a device with two gate levels, comprises the following steps:

REFERENCES:
patent: 3943543 (1976-03-01), Caywood
patent: 4035829 (1977-07-01), Iprietal
patent: 4055885 (1977-11-01), Takemoto
patent: 4141024 (1979-02-01), Kano et al.
patent: 4577392 (1986-03-01), Peterson
R. Gdula et al., CCD with Two Levels of Polysilicon, IBM Tech. Disc., vol. 21, No. 5, Oct. 1978.

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