Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Sidewall base contact
Reexamination Certificate
2001-10-26
2003-06-03
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Sidewall base contact
C438S348000, C438S253000, C257S508000
Reexamination Certificate
active
06573147
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of forming the same, and more particularly, to a semiconductor device having a contact and a method of forming the same.
2. Description of the Related Art
As the integration density of semiconductor devices increases, the area of cells formed in semiconductor devices and the critical dimension CD of bit lines decrease considerably. Also, contact holes connecting bit lines and lower conductive layers are refined. As a result, the ratio of the depth to the diameter of a contact hole, i.e., the aspect ratio, is increased, and the contact hole needs a plug material having excellent gap-filling characteristics.
FIGS. 1 through 4
are cross-sectional views describing a semiconductor device having a general contact and the steps of a method of forming the same. Referring to
FIG. 1
, an interlayer dielectric layer
14
is formed on a semiconductor substrate
10
having a lower conductive layer
12
. A contact hole
16
is formed by selectively etching a portion of the interlayer dielectric layer
14
to expose the lower conductive layer
12
.
With reference to
FIG. 2
, an ohmic layer
18
is formed by depositing a conductive material on the exposed lower conductive layer
12
. A first barrier layer
20
is formed on the entire surface of the contact hole
16
and the interlayer dielectric layer
14
by a blanket method.
Referring to
FIG. 3
, a conductive layer
22
is formed on the entire surface of the semiconductor substrate
10
, on which the first barrier layer
20
is formed, to form a contact plug. The conductive layer
22
is formed of a material having excellent gap-filling capability and step coverage for the contact hole
16
.
With reference to
FIG. 4
, the first barrier layer
20
and the conductive layer
22
are removed and planarized to expose the surface of the interlayer dielectric layer
14
by using chemical mechanical polishing and an etch back process. A second barrier layer
24
and an upper conductive layer pattern
26
are sequentially formed on a contact plug
22
′ that is formed by a planarization process.
In general, tungsten W is used as the material for the contact plug
22
′ because tungsten has low contact resistance, excellent adhesion, and fine step coverage to the ohmic layer
18
. However, fluorine F contained in a tungsten plug moves to the ohmic layer
18
when thermally treated and thus, nonconductive Ti—F compound is formed. In order to solve this problem, titanium nitride TiN has recently been used as the contact plug
22
′.
Residual stress is generated in a process of forming the conductive layer
22
for forming a contact plug. For example, titanium nitride TiN is generally deposited to a thickness of 1500 Å or more to fill the contact hole
16
fully. In this case, the titanium nitride TiN layer is cracked due to residual stress while stabilizing the titanium nitride TiN layer after the deposition. Also, the crack in the titanium nitride TiN layer causes a crack in the interlayer dielectric layer
14
. The probability of a crack occurring increases with an increase in the aspect ratio of the contact hole
16
.
SUMMARY OF THE INVENTION
To solve the above problems, it is a first object of the present invention to provide a method of forming a contact which can prevent damage to an interlayer dielectric layer due to residual stress generated on a conductive layer use in forming a contact plug.
It is a second object of the present invention to provide a semiconductor device having a contact which can prevent damage to an interlayer dielectric layer due to residual stress generated on a conductive layer used in forming a contact plug.
Accordingly, in accordance with a first aspect of the invention, there is provided a method of forming a contact using a crack-protecting layer. An interlayer dielectric layer is formed on a semiconductor substrate on which a lower conductive layer is formed. A crack-protecting layer is formed of a dielectric layer on the interlayer dielectric layer. A contact hole is formed by etching the crack-protecting layer and the interlayer dielectric layer to expose the lower conductive layer. A conductive layer is formed to form a contact plug which fills the contact hole and covers the semiconductor substrate. The conductive layer is planarized.
The crack-protecting layer relieves or absorbs residual stress transferred from the conductive layer to the interlayer dielectric layer. The crack-protecting layer may be formed by a chemical vapor deposition (CVD) method or a spin-on glass (SOG) method.
The crack-protecting layer formed by the CVD method can be a single layer formed of one of SiOF, SiN, SiO
2
, SiOC, and TEOS, or is a compound layer containing at least one of SiOF, SiN, SiO
2
, SiOC, and TEOS. The crack-protecting layer formed by the SOG method can be a single layer containing one of a material having an inorganic silicide source and a material having an organic siloxane source, or can be a compound layer containing at least one of a material having an inorganic silicide source and a material having an organic siloxane source. The interlayer dielectric layer is formed of a material which is easily cracked due to residual stress transferred from the conductive layer.
In accordance with a second aspect of the invention, there is provided a semiconductor device in which a contact is formed using a crack-protecting layer. The semiconductor device includes a semiconductor substrate having a lower conductive layer; an interlayer dielectric layer formed on the semiconductor substrate and having a contact hole exposing the lower conductive layer; a crack-protecting layer formed on the interlayer dielectric layer; a contact plug for filling the contact hole; and an upper conductive layer formed on the contact plug.
The crack-protecting layer can be a single layer formed of one of SiOF, SiN, SiON, SiO
2
, SiOC, and TEOS, or a compound layer containing at least one of SiOF, SiN, SiON, SiO
2
, SiOC, and TEOS. The crack-protecting layer has a thickness of 100-1500 Å.
When a contact plug is formed, a crack-protecting layer relieving or absorbing residual stress is formed. As a result, a contact is formed without damage to an interlayer dielectric layer.
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US Patent Application US 2002/0089031A by Ang et al. US class 257/506.
Lee Myoung-bum
Moon Kwang-jin
Park Hee-sook
Mills & Onello LLP
Nguyen Thinh
LandOfFree
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