Method of forming a semiconductor device having a plurality of c

Details Method of forming a semiconductor device having a plurality of c Method of forming a semiconductor device having a plurality of c

1997-03-10

1999-07-27

Niebling, John F.

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

Having enclosed cavity

438137, 438193, H01L 2130, H01L 2146

Patent

active

059306513

ABSTRACT:
A P.sup.+ layer is formed on the lower surface of an N.sup.- substrate, and recesses are defined in the upper surface of the N.sup.- substrate. Then, P.sup.+ gate regions and bottom gate regions are formed in side walls and bottoms of the recesses. The N.sup.- substrate and an N.sup.- substrate are ultrasonically cleaned to remove impurities therefrom, then cleaned by pure water, and dried by a spinner. Then, while lands on the upper surface of the N.sup.- substrate are being held against the surface of the N.sup.- substrate, the N.sup.- substrates are joined to each other by heating them at 800.degree. C. in a hydrogen atmosphere.

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J. Nishizawa et al. "Effects of Gate Structure on Static Induction Thyristor", Tech. Dig. 1980 IEDM, 1980, pp. 658-661.
J. Nishizawa et al. "Analysis of Characteristic of Static Induction Thyristor", Tech. Res. Report, Electr. Comm. Soc. ED81-84 (1981) pp. 31-38; with Engl. Trans.
J. Nishizawa et al. "Static Induction Thyristor", Tech. Res. Report, Electr. Comm. Soc., ED81-7 (1981) pp. 49-55; with English-language Translation.

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