Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to conductive state
Reexamination Certificate
2001-09-28
2002-10-15
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to conductive state
C257S050000
Reexamination Certificate
active
06465282
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to a method of forming an integrated circuit, and more particularly to a method of forming a self-aligned antifuse link in an integrated circuit.
BACKGROUND
Integrated circuits (“IC”s) are typically fabricated with all internal connections set during the manufacturing process. While ICs with predetermined functions reduce development and manufacturing tooling costs, users often desire ICs that are tailored to a specific application, and an IC with predetermined functions may not fit the specific requirements of the application. Manufacturers thus provide programmable ICs that can be programmed either by the manufacturer or by a user with the functionality needed for a specific application.
Programmable functions are available in a variety ICs, which can tailored for use in many different applications. Programmable logic devices (“PLD”s), programmable logic arrays (“PLA”s), field programmable gate arrays (“FPGA”s), programmable read only memories (“PROM”s), and some dynamic random access memories (“DRAM”s), are several examples of programmable devices.
Programmable ICs are typically programmed by either selectively breaking or creating programmable links in the IC. Programmable links are electrical interconnects which are broken or created at selected electronic nodes in the circuit by the user after the IC has been fabricated and packaged. Such programming is undertaken in order to activate or deactivate the selected electronic nodes in the IC so that the IC can perform a desired function.
Programmable links may be used for a variety of functions in an IC, such as implementing logic functions; selecting redundant cells, rows, columns or banks in a memory device; selecting various options and parameters in an IC, such as modes of operation, device ID and timing values; and fine tuning of component values, such as for resistors and capacitors.
Two well known types of programmable links are fusible links and antifuse links. A fusible link is manufactured as a short circuit, and is programmed by applying a sufficiently high voltage/current to the leads of the fuse to blow the fuse, creating an open circuit. In contrast, an antifuse is manufactured as an open circuit, and is programmed by applying a sufficiently high voltage to the leads of the antifuse to break down the antifuse, creating a short circuit or a relatively low resistance link.
Antifuse links typically consist of two conductor (including semiconductor) elements having some type of dielectric or insulating material between them. During programming, the dielectric at selected points between the conductive elements is broken down by a current developed by applying a predetermined programming voltage to the conductive elements of selected links to thereby electrically connect the conducting elements.
There are generally several problems, however, with prior art approaches to fabricating an antifuse link in an integrated circuit. For example, standard antifuse manufacturing generally requires the use of several mask, deposition or etching steps during or after the formation of the antifuse, thus increasing the fabrication complexity and cost of the IC. Generally, a thin nitride or oxide dielectric is deposited on a semiconductor substrate, and is then masked and patterned to form the dielectric of the antifuse. In some prior art methods, the antifuse dielectric formation itself may be self-aligned, but additional masking and patterning steps are needed to form non-programmable connections. In other self-aligned prior art methods, non-programmable connections may be oxidized during the antifuse dielectric formation, and additional masking and etching steps are needed to remove the oxide from the non-programmable connection surfaces.
SUMMARY OF THE INVENTION
These problems are generally solved or circumvented, and technical advantages are generally achieved, by a preferred embodiment of the invention in which a block mask is used during in situ antifuse dielectric formation. Generally, the mask allows self-aligned oxidation of the antifuse dielectric while preventing oxidation of non-programmable or fixed connections. The dielectric is preferably aluminum oxide.
In accordance with a preferred embodiment of the present invention, a method of forming a programmable integrated circuit comprises forming first and second conductive stacks on a substrate, wherein the first and second stacks comprise an oxidizable metal; masking the first conductive stack with a block mask; and oxidizing an exposed portion of the oxidizable metal in the second stack, wherein the second stack becomes non-conductive. The method further comprises removing the block mask from the substrate; forming a interlayer dielectric encasing the first conductive stack and the second non-conductive stack, wherein the interlayer dielectric comprises vias to the first conductive and the second non-conductive stacks; and forming a metallization layer filling the vias in the interlayer dielectric. The first conductive stack forms a fixed connection and the second non-conductive stack forms an antifuse link.
In accordance with another preferred embodiment of the present invention, a method of forming an antifuse link in a programmable integrated circuit comprises forming separate first and second sections of an oxidizable metal layer on a substrate; forming an interlayer dielectric encasing the first and second sections of the oxidizable layer; and forming first and second vias in the interlayer dielectric to the first and second sections, respectively, of the oxidizable metal. The method further comprises forming a block mask to isolate the first section of the oxidizable metal; oxidizing an exposed portion of the second section of the oxidizable metal; removing the block mask from the substrate; and filling the vias with a second metal. The first section of the oxidizable metal forms a fixed connection between the second metal and the substrate, and the oxidized portion of the second section forms an antifuse link between the second metal and the substrate.
In accordance with yet another preferred embodiment of the present invention, a method of forming a programmable integrated circuit comprises forming separate first and second sections of a first conductive layer on a substrate; forming first and second sections of an oxidizable metal on the first and second sections of the conductive layer, respectively; and forming first and second sections of a second conductive layer on first and second sections of the oxidizable metal, respectively. The method further comprises masking the first sections of the first conductive layer, the oxidizable metal and the second conductive layer with a block mask; removing a portion of the second section of the second conductive layer; and oxidizing an exposed portion of the second section of the oxidizable metal. The method further comprises removing the block mask from the substrate; forming a interlayer dielectric covering the substrate, wherein the interlayer dielectric comprises vias to the first section of the second conductive layer and to the oxidized portion of the oxidizable metal; and forming a metallization layer filling the vias in the interlayer dielectric.
An advantage of a preferred embodiment of the present invention is that the number of mask, deposition, or etching steps is reduced relative to prior art methods
Another advantage of a preferred embodiment of the present invention is that the complexity and cost of the IC is reduced relative to prior art ICs.
Another advantage of a preferred embodiment of the present invention is that fixed connections may be formed during the formation of the antifuse links, and not before or after the antifuse links.
Another advantage of a preferred embodiment of the present invention is that fixed connections and antifuse links may be formed in the same vertical level on the substrate.
Another advantage of a preferred embodiment of the present invention is that fixed connections are masked by the block mask, and thus are not
Brintzinger Axel
Többen Dirk
Weber Stefan
Hoang Quoc
Infineon - Technologies AG
Nelms David
Slater & Matsil LLP
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