Method of forming a recessed contact bipolar transistor and fiel

Details Method of forming a recessed contact bipolar transistor and fiel Method of forming a recessed contact bipolar transistor and fiel

1990-06-22

1991-12-24

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 57, 437 59, 437203, 148DIG9, H01L 21265

Patent

active

050752413

ABSTRACT:
Disclosed is a scaled, self aligned, bipolar transistor and a method of fabrication which is compatible with MOSFET device structures. A transistor intrinsic base region is formed in the face of an isolated epitaxial region and polysilicon is deposited, patterned and etched to form emitter regions. An oxide cap and first sidewall oxide spacers are formed on the polysilicon emitters and the single crystal silicon is etched using the oxide covered emitters as a mask to form recessed regions in the epitaxial layer. The extrinsic base region is then formed adjacent at least one side of the base by implanting appropriate dopants into one of the recessed regions. A second sidewall oxide spacer is then formed on the vertical base emitter structure and a heavily doped collector contact region is formed by implanting appropriate dopants into another one of the recessed silicon regions. The collector contact region is self aligned to the second sidewall oxide spacer which prevents the contact of base and heavily doped collector. Finally, the oxide cap covering the upper emitter surfaces is removed and emitter, base and collector contact regions are silicided to reduce contact resistance.

REFERENCES:
patent: 3969165 (1976-07-01), Henderson
patent: 4529456 (1985-07-01), Anzai
patent: 4539742 (1985-09-01), Kanzaki
patent: 4774204 (1988-09-01), Havemann
patent: 4816423 (1989-03-01), Havemann
patent: 4868135 (1989-09-01), Ogura
patent: 4897703 (1990-01-01), Spratt
patent: 4962053 (1990-10-01), Spratt
patent: 4985744 (1991-01-01), Spratt et al.

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