Fishing – trapping – and vermin destroying
Patent
1994-11-21
1996-12-31
Fourson, George
Fishing, trapping, and vermin destroying
437190, 437944, 437200, 437192, H01L 2144
Patent
active
055894186
ABSTRACT:
A method is provided for forming a polysilicon buried contact of an integrated circuit, and an integrated circuit formed according to the same. A field oxide region is formed over a portion of a substrate leaving an exposed active region. An oxide layer is formed over the active region. A first photoresist layer is formed and patterned over the first silicon layer. The first silicon layer is then etched to form an opening therethrough to expose a portion of the oxide layer. The oxide layer is etched through the opening to expose a portion of the substrate. A conductive etch stop layer is formed over the exposed portion of the substrate and the first photoresist layer. The first photoresist layer and the etch stop layer overlying the first photoresist layer are then removed. A second silicon layer is formed over the first silicon layer and the remaining etch stop layer. A second photoresist layer is formed and patterned over the second silicon layer. The first and second silicon layers are then etched to form a conductive structure contacting the exposed portion of the substrate through the etch stop layer.
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Everhart C.
Fourson George
Galanthay Theodore E.
Hill Kenneth C.
Jorgenson Lisa K.
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