Method of forming a planar thin film transistor

Details Method of forming a planar thin film transistor Method of forming a planar thin film transistor

1993-06-23

1995-05-02

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 47, 437 60, 437919, H01L 2170, H01L 2700

Patent

active

054119090

ABSTRACT:
The disclosure includes preferred semiconductor transistor devices utilizing thin film transistors, as well as preferred methods of forming such devices. Specifically, a bottom thin film transistor gate is formed having a top surface. An insulating filler is provided adjacent the thin film transistor gate to an elevation at least as high as the thin film transistor gate top surface, and subsequently levelled to provide generally planar insulating surfaces adjacent the thin film transistor gate. The planar insulating surfaces are substantially coplanar with the thin film transistor gate top surface. A planar semiconductor thin film is then formed over the thin film transistor gate and over the adjacent planar insulating surfaces. The thin film is doped to form source and drain regions of a thin film transistor which is bottom gated by the thin film transistor gate.

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"A High Performance Quadruple Well, Quadruple Poly BiCMOS Process for Fast 16Mb SRAMs", Hayden, J. D., et al., IEDM 91-819 (1992).

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