Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2007-09-18
2007-09-18
Clark, S. V. (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S113000
Reexamination Certificate
active
11067113
ABSTRACT:
A package-ready light-sensitive integrated circuit and process for preparing a light-sensitive semiconductor substrate for packaging that provide for a reduced exposure of a light-sensitive integrated circuit to light. The package-ready light-sensitive integrated circuit includes a semiconductor substrate (e.g., a silicon wafer) with an upper surface and a lower surface and lateral edges, an individual light-sensitive integrated circuit formed in and on the upper surface of the semiconductor substrate, and an opaque material layer covering the lower surface and lateral edges of the semiconductor substrate. The opaque material layer prevents light from entering the semiconductor substrate and interfering with operation of the light-sensitive integrated circuit. The process includes first providing at least one semiconductor substrate with a plurality of light-sensitive integrated circuits formed in and on its upper surface. Next, the semiconductor substrate(s) is diced to form individual light-sensitive integrated circuits, each of which has a semiconductor substrate lower surface and semiconductor substrate lateral edges. The individual light-sensitive integrated circuits are then transferred into a magazine and their semiconductor substrate lower surface and semiconductor substrate lateral edges covered (for example by injection molding) with an opaque material (e.g., an opaque molding compound or opaque epoxy) to form an opaque material layer thereon, thereby forming coated light-sensitive integrated circuits. The coated light-sensitive integrated circuits are then removed from the magazine.
REFERENCES:
patent: 3839660 (1974-10-01), Stryker
patent: 4248920 (1981-02-01), Yoshizumi et al.
patent: 5087964 (1992-02-01), Hatta
patent: 5149958 (1992-09-01), Hallenbeck et al.
patent: 5355016 (1994-10-01), Swirbel et al.
patent: 5557150 (1996-09-01), Variot et al.
patent: 5612513 (1997-03-01), Tuttle et al.
patent: 5726501 (1998-03-01), Matsubara
patent: 5834323 (1998-11-01), Ghafghaichi et al.
patent: 5965933 (1999-10-01), Young et al.
patent: 5969426 (1999-10-01), Baba et al.
patent: 5989982 (1999-11-01), Yoshikazu
patent: 6015505 (2000-01-01), David et al.
patent: 6034441 (2000-03-01), Chen
patent: 6043429 (2000-03-01), Blish, II et al.
patent: 6118180 (2000-09-01), Loo et al.
patent: 6121656 (2000-09-01), Tanaka et al.
patent: 6198087 (2001-03-01), Boon
patent: 6201309 (2001-03-01), Honda et al.
patent: 6249044 (2001-06-01), Kao et al.
patent: 6265784 (2001-07-01), Kawano et al.
patent: 6355507 (2002-03-01), Fanworth
patent: 6373140 (2002-04-01), Onodera et al.
patent: 6468413 (2002-10-01), Fanti et al.
patent: 6528894 (2003-03-01), Akram et al.
patent: 6630736 (2003-10-01), Ignaut
patent: 6780669 (2004-08-01), Farnworth
patent: 6797544 (2004-09-01), Sakai et al.
patent: 6908784 (2005-06-01), Farnworth et al.
patent: 358134449 (2003-08-01), None
Clark S. V.
National Semiconductor Corporation
Pickering Mark C.
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