Method of forming a multilevel dielectric

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4272556, 4272557, 427294, 427404, 427579, 428428, 428448, 428469, 428901, B32B 900

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056077734

ABSTRACT:
A method of forming a planar dielectric layer over an interconnect pattern which requires fewer processing steps and has a lower dielectric constant than is obtained in the prior art. The method comprises providing a substrate having an electrical interconnect pattern thereon, forming a first layer of dielectric over the interconnect pattern, preferably by plasma generated TEOS oxide, forming a porous second layer of silicon-containing dielectric with low dielectric constant different from the first layer over the first dielectric layer from an inorganic silicon-containing composition, preferably hydrogen silsesquioxane and forming a third layer of dielectric different from the second layer over the second dielectric layer, preferably by a plasma generated TEOS oxide. The step of forming the second layer comprises the steps of depositing an inorganic silicon-containing composition capable of being pyrolytically converted to a silicon oxide over the first layer and placing the resulting structure in an essentially pure nitrogen and essentially moisture-free environment at a pressure at or below atmospheric pressure and then heating the silicon-containing composition to a temperature of from about 375.degree. C. to about 425.degree. C. and preferably 400.degree. C. for from about 30 minutes to about 90 minutes to convert the silicon-containing composition to silicon oxide.

REFERENCES:
patent: 4756977 (1988-07-01), Haluska et al.

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