Method of forming a metal semiconductor field effect transistor

Details Method of forming a metal semiconductor field effect transistor Method of forming a metal semiconductor field effect transistor

1981-08-31

1982-11-16

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29591, 148187, 148188, H01L 21225, H01L 2126

Patent

active

043588913

ABSTRACT:
A metal silicon field effect transistor and the method of producing such a transistor whereby all of the elements of the transistor are defined by a single masking step. These elements include the channel of the first effect transistor as well as the source and drain regions therefor and also the gate which completes the transistor. The transistor is formed by depositing a doped polysilicon layer on the surface of the semiconductor substrate, depositing an oxide layer thereover and opening a via in the insulating layer and the doped polysilicon layer to expose the silicon substrate. The channel is formed by ion implant through the via thus opened. The doped polysilicon layer serves as a diffusant source for the formation of the source and drain regions of the transistor which regions are defined by the via. The via then serves to define the area where the gate is to be formed in contact with the substrate region containing the channel.

REFERENCES:
patent: 3639186 (1972-02-01), Forster et al.
patent: 3804681 (1974-04-01), Drangeid et al.
patent: 3906540 (1975-09-01), Hollins
patent: 3942241 (1976-03-01), Harigaya et al.
patent: 4045248 (1977-08-01), Shannon
patent: 4048712 (1977-09-01), Buiatti
patent: 4304042 (1981-12-01), Yeh
patent: 4305760 (1981-12-01), Trudel

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