Method of forming a magnetic tunnel junction structure

Semiconductor device manufacturing: process – Having magnetic or ferroelectric component

Reexamination Certificate

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C438S048000, C438S059000, C438S085000, C438S131000, C257SE21665

Reexamination Certificate

active

07579197

ABSTRACT:
In a particular illustrative embodiment, a method of forming a magnetic tunnel junction (MTJ) device is disclosed that includes forming a trench in a substrate. The method further includes depositing a magnetic tunnel junction (MTJ) structure within the trench. The MTJ structure includes a bottom electrode, a fixed layer, a tunnel barrier layer, a free layer, and a top electrode. The method also includes planarizing the MTJ structure. In a particular example, the MTJ structure is planarized using a Chemical Mechanical Planarization (CMP) process.

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patent: 6072718 (2000-06-01), Abraham et al.
patent: 7109539 (2006-09-01), Lu
patent: 2005/0095855 (2005-05-01), D'urso et al.
“MRAM Fact Sheet,” Document No. MRAMTECHFS, Rev 6, Freescale Semiconductor, Inc. 2007.
Gallagher; Parkin, “Development of the Magnetic Tunnel Junction MRAM at IBM: from first junctions to a 16-Mb MRAM demonstrator chip,” IBM J. Res. & Dev. vol. 50 No. 1 Jan. 2006, 0018-8646/06 2006 IBM.
Kimura; Pagiamtzis; Sheikholeslami; and Hanyu, “A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices,” Graduate School of Information Sciences, Tohoku University, Aoba-Yama 05, Sendai 980-8579, Japan and Department of Electrical and Computer Engineering, University of Toronto, 10 Kings's College Road, Toronto, ON M5S 3G4, Canada, May 2004.

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