Method of forming a layer of silica to be eliminated subsequentl

Details Method of forming a layer of silica to be eliminated subsequentl Method of forming a layer of silica to be eliminated subsequentl

1995-12-01

1998-04-07

Niebling, John

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Including integrally formed optical element

438723, 438975, 385131, 1566531, 216 72, G02B 612, G02B 642

Patent

active

057364290

ABSTRACT:
In a method for mounting an integrated optical component, a starting base structure includes a silica lower confinement layer and the cores of the future optical waveguides. This basic structure includes an alignment abutment so that a component to be mounted can be subsequently aligned with these waveguides. A silicon barrier layer is deposited on the abutment. Flame hydrolysis deposition is then used to deposit an upper silica layer to constitute the upper confinement layer of the waveguides. This silica layer also covers the alignment abutment, however. For this reason the region of the abutment is then etched by reactive ion etching to expose the abutment, which is protected from this etching by the barrier layer. The component to be mounted is then located relative to the abutment.

REFERENCES:
patent: 4946251 (1990-08-01), Ashwell et al.
patent: 5059475 (1991-10-01), Sun et al.
patent: 5299276 (1994-03-01), Okamura et al.
patent: 5483613 (1996-01-01), Bruce et al.
Patent Abstracts of Japan, vol. 017, No. 495 (P-1608) Sep. 7, 1993, corresponding to JP-A-05 127030 (Fujikura LTD) May 25, 1993.
Patent Abstracts of Japan, vol. 016, No. 241 (P-1363) Jun. 3, 1992 corresponding to JP-A-04 052606 (Furukawa Electric Co, Ltd) Feb. 20, 1992.

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