Method of forming a lateral field effect transistor having reduc

Details Method of forming a lateral field effect transistor having reduc Method of forming a lateral field effect transistor having reduc

1995-06-07

1998-05-12

Nguyen, Tuan H.

Fishing, trapping, and vermin destroying

437 40DM, 437 41DM, 437 6, 148DIG126, H01L 21265

Patent

active

057504164

ABSTRACT:
A power field effect transistor has a laterally extending channel region which is not formed by double diffusion. The channel region may be formed in epitaxial silicon which is not doped after being grown. The drain electrode of the transistor is disposed on a bottom surface of the substrate upon which the transistor structure is formed. When the transistor is turned on, the channel region inverts thereby forming a conductive path from a source region, laterally through the inverted channel region, substantially vertically through a sinker region to the underlying substrate, through the substrate, and to the drain electrode.

REFERENCES:
patent: 5442219 (1995-08-01), Kato
patent: 5451797 (1995-09-01), Davis et al.
Yoshida et al., "A High Power MOSFET with a Vertical Drain Electrode and a Meshed Gate Structure", IEEE Jour. of Solid-State Circuits, vol. SC-11, No. 4, Aug. 1976, pp. 472-477.
Morita et al., "Si UHF MOS High-Power FET", IEEE Trans. on Electron Devices, pp. 733-734, Nov. 1974.

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