Method of forming a high performance, high voltage non-epi bipol

Details Method of forming a high performance, high voltage non-epi bipol Method of forming a high performance, high voltage non-epi bipol

1997-08-11

1999-04-20

Nguyen, Tuan H.

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

438234, 438335, 438365, H01L 21331

Patent

active

058952470

ABSTRACT:
A high performance, high voltage non-epi bipolar transistor including a substrate (12) with an n-type conductivity well (13) and an insulative layer (14) with first (15), second (17) and third (18) openings exposing the substrate in the well. A first p-type volume (19) surrounding the first and second openings (15, 17) beneath the insulative layer (14), and a second n-type volume (22) surrounding the third opening (18) beneath the insulative layer (14). A p-type intrinsic base (25) in the first opening (15) and in contact with the first volume (19). A p-type extrinsic base (30) in the second opening (17) and in contact with the first volume (19). An n-type collector (32) in the third opening (18) and in contact with the second volume (22), and an n-type emitter layer (27) in the first opening in overlying contact with the intrinsic base (25).

REFERENCES:
patent: 4435225 (1984-03-01), Shideler et al.
patent: 4839302 (1989-06-01), Kameyama et al.
patent: 4866001 (1989-09-01), Pickett et al.

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