Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1997-01-08
1999-05-04
Dutton, Brian
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
255665, 255964, H01L 218242
Patent
active
058997253
ABSTRACT:
Disclosed is a method of growing hemispherical grained silicon (HSG silicon) over a conductive seed layer. In a preferred embodiment, a contact window is etched in an insulating layer to expose a circuit node, such as an active area of a substrate or a contact plug leading to an active area. A layer of titanium nitride is deposited over the insulating layer and into the contact window. The titanium nitride (TiN) serves as the seed layer for HSG silicon growth to follow. Polysilicon is deposited and grows around nucleation sites on the TiN surface. The TiN provides both electrical and mechanical support for the HSG silicon. Additionally, as TiN is an effective diffusion barrier, the HSG silicon may be heavily doped without undue risk of dopant diffusion to the active area.
REFERENCES:
patent: Re35420 (1997-01-01), Cathey et al.
patent: 5037773 (1991-08-01), Lee et al.
patent: 5043780 (1991-08-01), Fazan et al.
patent: 5102832 (1992-04-01), Tuttle
patent: 5112773 (1992-05-01), Tuttle
patent: 5130885 (1992-07-01), Fazan et al.
patent: 5138411 (1992-08-01), Sandhu
patent: 5139974 (1992-08-01), Sandhu et al.
patent: 5182232 (1993-01-01), Chhabra
patent: 5191509 (1993-03-01), Wen
patent: 5266514 (1993-11-01), Tuan et al.
patent: 5278091 (1994-01-01), Fazan et al.
patent: 5318920 (1994-06-01), Hayashide
patent: 5320880 (1994-06-01), Sandhu et al.
patent: 5340765 (1994-08-01), Dennison et al.
patent: 5366917 (1994-11-01), Watanabe et al.
patent: 5372962 (1994-12-01), Hirota
patent: 5385863 (1995-01-01), Tatsumi et al.
patent: 5405801 (1995-04-01), Han et al.
patent: 5407534 (1995-04-01), Thakur
patent: 5418180 (1995-05-01), Brown
patent: 5444013 (1995-08-01), Akram et al.
patent: 5458697 (1995-10-01), Ishigami et al.
patent: 5489544 (1996-02-01), Rajeevakumar
patent: 5561307 (1996-10-01), Mihara et al.
patent: 5563090 (1996-10-01), Lee et al.
patent: 5569614 (1996-10-01), Kataoka
patent: 5622888 (1997-04-01), Sekine et al.
patent: 5741734 (1998-04-01), Lee
patent: 5760434 (1998-06-01), Zahurak et al.
patent: 5817555 (1998-10-01), Cho
Watanabe, et al., "An Advanced Technique for Fabricating Hemispherical-Grained (HSG) Silicon Storage Electrodes," IEEE Transactions on Electron Devices, vol. 42, No. 2, Feb. 1995, pp. 295-300.
Watanabe, et al., "Hemispherical Grained Si Formation on In-Situ Phosphorus Doped Amorphous-Si Electrode for 256Mb DRAM's Capacitor," IEEE Transactions on Electron Devices, vol. 42, No. 7, Jul. 1995, pp. 1247-1254.
Sakai, et al., "Novel Seeding Method for the Growth of Polycrystalline Si Films with Hemispherical Grains," Appl. Phys. Lett., vol. 61, No. 2, Jul. 13, 1992, pp. 159-161.
Dutton Brian
Micro)n Technology, Inc.
Thomas Toniae M.
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