Method of forming a GaAs FET having etched ohmic contacts

Details Method of forming a GaAs FET having etched ohmic contacts Method of forming a GaAs FET having etched ohmic contacts

1992-06-22

1995-02-14

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437184, 437202, 437247, 148DIG20, H01L 21265

Patent

active

053895649

ABSTRACT:
The present invention provides a III-V semiconductor FET (10, 30, 40) having etched ohmic contacts (19, 20, 36, 37, 43, 44). A gate (16) of the FET (10, 30, 40) is formed in contact with a surface of a III-V substrate (11). An ohmic contact (19, 20, 36, 37, 43, 44) is created to include an alloy in contact with the surface of the substrate (11). The ohmic contact (19, 20, 36, 37, 43, 44) is formed to abut the gate structure (16, 17, 18) by covering a portion of the gate structure (16, 17, 18) and the substrate (11) with the ohmic contact (19, 20, 36, 37, 43, 44), then, removing portions of the ohmic contact from the gate structure (16, 17, 18) by etching. The ohmic contact (19, 20, 36, 37, 43, 44) is formed to be substantially devoid of gold.

REFERENCES:
patent: 4870033 (1989-09-01), Hotta et al
patent: 5091338 (1992-02-01), Tsuchimoto et al.
patent: 5100835 (1992-03-01), Zheng
patent: 5275971 (1994-01-01), Wu et al.
Kazuyoshi Ueno et al., "A High . . . characteristic", IEEE International Electron Device Meeting, pp. 82-85, Dec. 4, 1985.

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