Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
1998-10-14
2001-12-18
Everhart, Caridad (Department: 2811)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S458000, C438S462000
Reexamination Certificate
active
06331449
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a structure of a semiconductor device and a method of manufacturing the semiconductor device, and particularly to a semiconductor device having bump electrodes formed by electroplating.
2. Description of the Related Art
Bump electrodes correspond to protruded electrodes formed over bonding pads and wires of a semiconductor integrated circuit to connect a semiconductor substrate with the semiconductor integrated circuit formed thereon and a substrate, a film carrier and a lead frame or the like opposite to the semiconductor substrate to one another. As methods of manufacturing the bump electrodes, there are known electroplating, ball bonding, etc. In particular, the electroplating is excellent in fine-pitch formation and mass productivity of the bump electrodes and is in the mainstream of a bump forming technique typified by gold bump electrodes at present.
A structure on the semiconductor substrate for forming the bump electrodes thereon will now be described.
A semiconductor integrated circuit is formed on the semiconductor substrate. The surface of the semiconductor integrated circuit is covered with a surface protective film such as a silicon oxide film, a silicon nitride film or the like. By using photolithography and etching, openings are defined in portions where the bump electrodes are formed.
In the semiconductor integrated circuit, a lithography technique using a reduction projection exposure system is used in its forming process to micro-fabricate patterns. For the reason of a reduction in manufacturing cost in this case, an electric characteristic evaluating element, pattern formation accuracy measuring marks, mask alignment marks, etc. necessary for quality control on the forming process of the semiconductor integrated circuit are inserted into a dicing area for dividing the semiconductor substrate into IC chips. However, the existence of a hard and thick surface protective film or the like in the dicing area, which constitutes structures of the electric characteristic evaluating element, pattern formation accuracy measuring marks, mask alignment marks, etc. is undesired in the subsequently-executed dicing process for dividing the semiconductor substrate into IC chips to wear the blade of a dicing saw. Thus, such a contrivance that parts other than the electric characteristic evaluating element are removed and no load is placed on the dicing process, is put on the surface protective film or the like.
A general method for forming gold bump electrodes by electroplating will now be described.
The aforementioned semiconductor substrate for forming bump electrodes is first prepared. A metal thin film, which serves as a bed used for each bump electrode, is formed over the semiconductor substrate. The metal thin film functions so as to provide adhesion to the semiconductor substrate and the prevention of diffusion thereof into a wired metal constituting the semiconductor integrated circuit and serves as a path for supplying a plating current upon formation of each bump electrode.
Next, a resist film having openings for determining a plating shape or configuration of each bump electrode is formed over the metal thin film. Although the resist film is generally formed by the lithography technique, it is different from a resist film used to form a semiconductor integrated circuit structure. As the resist film, a high viscosity resist is applied relatively thick so as to range from about 20 &mgr;m to 50 &mgr;m in thickness and then cured by the normal heat treatment.
A plating current is next supplied to the metal thin film on the semiconductor substrate, which has been immersed in a plating solution to thereby deposit plated deposits within the openings of the resist film on the semiconductor substrate so as to form the bump electrodes.
The resist film is next removed by a resist release agent. With the formed plated deposits as masks, the metal thin film on the semiconductor substrate is etched. Thereafter, heat treatment or the like is performed as needed so that bump electrode structures are formed.
SUMMARY OF THE INVENTION
With the foregoing in view, it is therefore an object of the present invention to provide a semiconductor device capable of restraining the destruction of a resist due to fine projections and depressions formed on a dicing area upon subsequent heat treatment or the like even when the projections and depressions are formed on the dicing area.
According to one aspect of this invention, for achieving the above object, there is provided a semiconductor device, comprising:
a plurality of device areas;
at least one dicing area indicative of an area for dividing the device areas into pieces;
areas each including projections and depressions formed in the dicing area; and
covering layers each covering the areas including the projections and depressions.
Typical ones of various inventions of the present application have been shown in brief. However, the various inventions of the present application and specific configurations of these inventions will be understood from the following description.
REFERENCES:
patent: 4967259 (1990-10-01), Takagi
patent: 5132252 (1992-07-01), Shiraiwa et al.
patent: 5399462 (1995-03-01), Sachdev et al.
patent: 6022792 (2000-02-01), Ishii et al.
patent: 6046101 (2000-04-01), Dass et al.
Everhart Caridad
OKI Electric Industry Co., Ltd.
Volentine & Francos, PLLC
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