Method of forming a controlled low collector breakdown voltage t

Details Method of forming a controlled low collector breakdown voltage t Method of forming a controlled low collector breakdown voltage t

1995-06-07

1997-03-04

Nguyen, Tuan H.

Fishing, trapping, and vermin destroying

437150, 437154, 437 51, H01L 21265

Patent

active

056078676

ABSTRACT:
An npn transistor having a low collector-base breakdown voltage. An emitter region (104, 106) of a first conductivity type is located in a semiconductor substrate (102). A base region (14) of a second conductivity type is located within the emitter region (104,106) and a shallow collector region (18) of the first conductivity type is located within the base region (14). The shallow collector region (18) may be doped with arsenic and/or phosphorus such that the dopant concentration and depth of the shallow collector region (18) provide a low collector-base breakdown voltage.

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