Method of forming a conductive coating on a semiconductor...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material

Reexamination Certificate

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C438S125000, C438S613000, C438S614000

Reexamination Certificate

active

06551912

ABSTRACT:

The present invention relates to a method of forming a conductive coating on a semiconductor device, and in particular of forming a conductive coating on a semiconductor device for reducing the skin effect in such a semiconductor component.
BACKGROUND
In radio applications, in particular applications comprising power amplifiers, many transistors have large active silicon areas. Furthermore, the transistors, which can be discrete or integrated, handle high currents at high frequencies, typically in the GHz range.
Usually one contact terminal of such transistors is connected to the package of the semiconductor device, that holds the respective transistor chip, via the semiconductor substrate and in particular to a metal part of the package, usually called a leadframe.
The terminal connected to the package can vary between different applications. However, usually it is the emitter terminal in bipolar technology and the source terminal in MOS technology. At low frequencies, including DC, the current will flow homogeneously through the semiconductor and the resistance will be low.
However, due to the skin effect it is known that currents in the radio frequency range will flow close to the edges of the die as shown in FIG.
1
. In such a case the skin effect will cause the resistance to be several orders of magnitude higher than the resistance at lower frequencies.
Furthermore, the transistor is often connected to a circuit in which the impedance in series with the terminal is critical in order to obtain high performance in terms of power gain, linearity efficiency, thermal behaviour, etc. This impedance will affect the performance negatively and in particular if the resistive part of the impedance becomes large. Thus, there is a problem in some applications when the impedance is high due to the skin effect.
In order to solve this problem it is possible to attach bond wires to the transistor. However, a bond wire solution is not feasible in some applications because the maximum number of bond wires is limited. Also, the use of bond wires is expensive because they have to be attached to each separate die during assembly as opposed to interconnections on wafers, which are attached on all dies simultaneously. Another disadvantage using bond wires is added parasitic inductance.
Furthermore, in U.S. Pat. No. 5,877,037 a process for reducing bond resistance in semiconductor devices and semiconductor circuits is disclosed. According to the process a coating, preferably a metal coating, is deposited on the sidewalls of a semiconductor component in order to reduce the skin effect sheet resistance of the semiconductor component.
However, the method of depositing the metal coating as described in this patent is both time consuming and also does not result in a metal layer adequate for many applications. Moreover, the metal layer has to be applied individually for each component or device.
SUMMARY
It is an object of the present invention to overcome the problems as outlined above and to provide a method, which provides an improved conductive layer on the side walls of the semiconductor devices/components and which is more cost efficient in terms of processing costs and processing time.
This object and others are obtained by a method wherein a conductive layer, in particular a metal layer, in one single process step is applied on the side walls before a wafer being processed is partitioned into separate dies.
Thus, a conductive layer is formed on a semiconductor die by first attaching a semiconductor wafer to a support wafer using for example a wax or an adhesive, then cutting the semiconductor wafer into dies, and finally depositing a conductive layer on the sides of the dies.
The conductive layer is preferably a metal layer extending into the support layer, which ensures that, when the support wafer is removed, the conductive layer extends all the way over the sidewall of the semiconductor die.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the methods, processes, instrumentalities and combinations particularly pointed out in the appended claims.


REFERENCES:
patent: 4734749 (1988-03-01), Levi
patent: 5166097 (1992-11-01), Tanielian
patent: 5633047 (1997-05-01), Brady et al.
patent: 5877037 (1999-03-01), O'Keefe et al.
patent: 5956605 (1999-09-01), Akram et al.
patent: 6331735 (2001-12-01), Blish, II et al.
patent: 6376769 (2002-04-01), Chung
JP 5160257 Abstract (Fujitsu Ltd), Jun. 25, 1993, World Patents Index (online), London, UK, Derwent Publications, Ltd. (retrieved on Oct. 19, 2000); Retrieved from EPO WPI Database.DW 199330, Access No. 1993-238189 & JP 5160257 A Oct. 6, 1993 (abstract) (online) (retrieved on Oct. 19, 2000) retrieved from EPO PAJ Database.
JP 10256491 Abstract (NEC Corp et al), Nov. 25, 1998, World Patents Index (online), London, UK, Derwent Publications, Ltd. (retrieved on Oct. 19, 2000); Retrieved from EPO WPI Database.DW 200004, Access No. 1998-574682 & JP 10256491 A Dec. 31, 1998 (abstract) (online) (retrieved on Oct. 19, 2000) retrieved from EPO PAJ Database.
JP 7029857 Abstract (NEC Yamaguchi Ltd), Jan. 31, 1995, World Patents Index (online), London, UK, Derwent Publications, Ltd. (retrieved on Oct. 19, 2000); Retrieved from EPO WPI Database.DW 199514, Access No. 1995-103271 & JP 7029857 A May 31, 1995 (abstract) (online) (retrieved on Oct. 19, 2000) retrieved from EPO PAJ Database.
JP 8037167 Abstract (Hitachi Ltd), Feb. 6, 1996, World Patents Index (online), London, UK, Derwent Publications, Ltd. (retrieved on Oct. 19, 2000); Retrieved from EPO WPI Database.DW 199625, Access No. 1996-148705 & JP 8037167 A Jun. 28, 1996 (abstract) (online) (retrieved on Oct. 19, 2000) retrieved from EPO PAJ Database.

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