Method of forming a circuitry isolation region within a semicond

Details Method of forming a circuitry isolation region within a semicond Method of forming a circuitry isolation region within a semicond

1999-05-14

2000-08-08

Pham, Long

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438425, 438427, 438449, H01L 2176

Patent

active

061001627

ABSTRACT:
A method of forming a circuitry isolation region within a semiconductive wafer comprises defining active area and isolation area over a semiconductive wafer. Semiconductive wafer material within the isolation area is wet etched using an etch chemistry which forms an isolation trench proximate the active area region having lowestmost corners within the trench which are rounded. Electrically insulating material is formed within the trench over the previously formed round corners. In accordance with another aspect, the semiconductive wafer material within the isolation area is etched using an etch chemistry which is substantially selective relative to semiconductive wafer material within the active area to form an isolation trench proximate the active area region. In accordance with still another aspect, a method of forming a circuitry isolation region within a semiconductive wafer comprises masking an active area region over a semiconductive wafer. The active area region is provided with an impurity doping of a first conductivity type. An impurity of a second conductivity type is provided within the semiconductive wafer proximate the masked active area region. Second conductivity type provided semiconductive wafer material is substantially selectively etched relative to first conductivity type provided semiconductive wafer material forming a trench proximate the active area region. Electrically insulating material is formed within the trench.

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patent: 5925911 (1999-07-01), Okabe et al.
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