Metal working – Method of mechanical manufacture – Electrical device making
Patent
1992-09-01
1993-06-08
Arbes, Carl J.
Metal working
Method of mechanical manufacture
Electrical device making
29827, 29840, 174 524, 206332, 361404, H05K 116
Patent
active
052168069
ABSTRACT:
A method of packaging an integrated circuit chip having an active surface with a pattern of input/output pads. A package member is positioned to frame the integrated circuit chip, leaving a gap between the active chip surface and an interconnect support surface of the package member. A filler material is deposited within the gap, simultaneously fixing the chip to the package member and providing a bridge that is coplanar with the active and interconnect support surfaces. A pattern of conductive printed circuit interconnects is preferably photolithographically formed from the input/output pads to an edge of the package member. The resulting structure can then be electrically connected to a substrate, such as a printed circuit board, by bonding the interconnects to contact sites on the substrate. Optionally, a number of integrated circuit chips can be connected to a single package member to form a multi-chip module.
REFERENCES:
patent: 3679941 (1972-07-01), La Combe
patent: 3757175 (1973-09-01), Sookim et al.
patent: 4300153 (1981-11-01), Hayakawa et al.
patent: 4371912 (1983-02-01), Guzik
patent: 4426773 (1984-01-01), Hargis
patent: 4866507 (1989-09-01), Jacobs et al.
patent: 4866508 (1989-09-01), Eichelberger et al.
patent: 4918811 (1990-04-01), Eichelberger et al.
patent: 4979289 (1990-12-01), Dunaway et al.
patent: 5018002 (1991-05-01), Neugebauer et al.
Arbes Carl J.
Atmel Corporation
LandOfFree
Method of forming a chip package and package interconnects does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming a chip package and package interconnects, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming a chip package and package interconnects will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1926283