Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1997-01-27
1998-09-22
Ledynh, Bot L.
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438398, 438253, 438255, 3613211, 3613214, 3613215, H01L 2172
Patent
active
058113444
ABSTRACT:
The present invention relates to a stacked capacitor of a DRAM cell, particully remarkably increasing a surface area of a storage electrode of a stacked capacitor without increasing an occupation area and a complexity of fabrication thereof. According to the invention, by use of depositing a protection polysilicon layer on a rugged polysilicon layer, which can provide an increased surface area of a storage electrode, a chemical oxide layer underlying the rugged polysilicon layer is protected by the protection polysilicon layer during a HF dip and thus a peeling of the rugged polysilicon layer as a result of the chemical oxide loss will not occur, thereby preventing a production yield loss.
REFERENCES:
patent: 5082797 (1992-01-01), Chan et al.
patent: 5130885 (1992-07-01), Fazan et al.
patent: 5213992 (1993-05-01), Lu
Chen Kuang-Chao
Tu Tuby
Wang May
Ledynh Bot L.
Mosel Vitelic Incorporated
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