Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
2005-11-15
2005-11-15
Mai, Anh Duy (Department: 2814)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C438S396000, C438S250000, C438S253000
Reexamination Certificate
active
06964909
ABSTRACT:
An improved capacitor that is less susceptible to the depletion effect and methods for providing the same. The capacitor comprises a first and second electrode and an insulating layer interposed therebetween. The first electrode includes a bulk layer comprising n-doped polysilicon. The first electrode also includes an interface layer extending from a first surface of the bulk layer to the insulating layer. The interface layer is heavily doped with phosphorus so that the depletion region of the first electrode is confined substantially within the interface layer. The method of forming the interface layer comprises depositing a layer of hexamethldisilazane (HMDS) material over the first surface of the bulk layer so that HMDS molecules of the HMDS material chemically bond to the first surface of the bulk layer. The method further comprises annealing the layer of HMDS material in a phosphine ambient so as to replace CH3methyl groups with PH3molecules. The interface layer is then passivated in a nitrogen ambient having a reduced temperature so as to reduce the number of dangling silicon bonds of the lower electrode in a manner that results in reduced thermal damage to neighboring circuit elements.
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DeBoer Scott J.
Powell Don C.
Duy Mai Anh
Knobbe Martens Olson & Bear LLP
Micro)n Technology, Inc.
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