Method of forming a antifuse structure with increased breakdown

Details Method of forming a antifuse structure with increased breakdown Method of forming a antifuse structure with increased breakdown

1995-05-08

1996-03-26

Fourson, George

Fishing, trapping, and vermin destroying

437922, 437947, 148DIG55, H01L 2170, H01L 2700

Patent

active

055020003

ABSTRACT:
An antifuse is provided which includes a first conductive layer, an antifuse layer formed on the first conductive layer, and a second conductive layer formed on the antifuse layer. A portion of the antifuse layer forms a substantially orthogonal angle with the first conductive layer and the second conductive layer. This "corner" formation of the antifuse enhances the electric field at this location during programming, thereby providing a predictable location for the filament, i.e. the conductive path between the first and second conductive layers. This antifuse provides other advantages including: a relatively low programming voltage, good step coverage for the antifuse layer and the upper conductive layer, a low, stable resistance value, and minimal shearing effects on the filament.

REFERENCES:
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patent: 5181096 (1993-01-01), Forouhi
patent: 5242851 (1993-09-01), Choi
patent: 5290734 (1994-03-01), Boardman
Kueing-Long Chen, et al., "A Sublithographic Antifuse Structure for Field-Programmable Gate Array Applications", IEEE Electron Device Letters, 13 (1992) Jan., pp. 53-55.
Cook, Brian; Keller, Steve; "Amorphous Silicon Antifuse Technology for Bipolar Proms", IEEE, 1986 Bipolar Circuits and Technology Meeting, pp. 99-100.
S. Chiang, R. Forouhi, W. Chen, F. Hawley, J. McCollum, E. Hamdy, and C. Hu, "Antifuse Structure Comparison for Field Programmable Gate Arrays", IEEE, pp. 24.6.1-24.6.4, Copyright 1992.

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