Method of filling trenches with silicon and structures

Coating processes – Electrical product produced – Condenser or capacitor

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29576W, 156612, 156643, 427 93, 427 94, 427 95, 4271264, H01L 2176

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044735987

ABSTRACT:
Isolation regions in a semiconductor substrate are formed by covering at least one of the surfaces within a trench within the substrate with non-nucleating material, providing a layer of nucleating material on at least one surface of the non-nucleating material and then filling the trench with polycrystalline silicon or epitaxial silicon or both.

REFERENCES:
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patent: 3979237 (1976-09-01), Morcom et al.
patent: 3998673 (1976-12-01), Chow
patent: 4191788 (1980-03-01), Harington
patent: 4255207 (1981-03-01), Nicolay
patent: 4256514 (1981-03-01), Pogge
IBM Technical Disclosure Bulletin, vol. 23, No. 2, Jul. 1980, "Reproducible Technique for Simultaneous Deposition of Poly-Epi on Oxide-Silicon", V. J. Silverstri and D. D. Tang; pp. 819-820.
J. Electrochem. Soc.: Solid State Science, vol. 114, No. 11, Nov. 1967, "Behavior of Large-Scale Surface Perturbations during Silicon Epitaxial Growth", W. R. Runyan, Earl G. Alexander, and S. E. Craig, Jr.; pp. 1154-1158.
J. Electrochem. Soc.: Reviews and News, vol. 127, No. 3, Mar. 1980, "Microlithography-Key to Solid-State Device Fabrication", C. A. Deckert and D. L. Ross; pp. 45C-46C.
IEEE Transactions on Electron Devices, vol. ED-28, No. 11, Nov. 1981, "Reactive Ion Etching for VLSI", Linda M. Ephrath; pp. 1315-1319.
Reprinted from "Semiconductor Silicon 1981", Copyright 1981 by The Electrochemical Society, Inc., Dry Etching for VLSI-A Review, L. M. Ephrath; pp. 627-637.

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