Semiconductor device manufacturing: process – Having superconductive component
Reexamination Certificate
2001-06-20
2003-02-04
Christianson, Keith (Department: 2813)
Semiconductor device manufacturing: process
Having superconductive component
Reexamination Certificate
active
06514774
ABSTRACT:
TECHNICAL FIELD
The present invention relates to the construction of circuits including a substrate, and in particular provides a method of forming a step edge in a substrate.
BACKGROUND ART
Superconducting materials are currently finding applications in a number of areas. For example, superconducting quantum interference devices (SQUIDS) have applications in geophysical mineral prospecting.
In many instances it is desired to form features in the surface of a substrate to alter or control physical or electrical aspects of circuits constructed over the substrate. For example, a ‘step edge’ in the surface of the substrate is commonly required in the construction of circuits.
A common circuit element in superconducting devices is the Josephson Junction. Which may be formed in a variety of ways. Josephson Junctions are commonly implemented by forming the superconducting material over a step edge in a substrate. However, characteristics of the junction, such as the critical density, can be difficult to control.
DISCLOSURE OF INVENTION
Throughout the following, the terms ‘superconducting material’, ‘superconducting device’ and the like are used to refer to a material or device which, in a certain state and at a certain temperature, is capable of exhibiting superconductivity. The use of such terms does not imply that the material or device exhibits superconductivity in all states or at all temperatures.
From a first aspect the present invention provides a method of forming a step edge in a surface of a crystalline substrate, comprising the steps of:
forming a layer of resist over the surface;
removing areas of the resist to expose selected areas of the surface, thereby forming side walls in the layer of the resist the side walls bounding the exposed areas of the surface: and
exposing the resist and substrate to an ion beam, thereby etching the resist and the exposed areas of the surface;
wherein the angles between an axis of incidence of the ion beam and the surface, and between the axis of incidence of the ion beam and the resist side walls, are selected in order to form a step edge with predetermined angle and height characteristics, and wherein an angular position of the axis of incidence of the ion beam about an axis formed by a normal to the surface is selected in order to control the step edge formation.
The selection of the angular position of the axis of incidence of the ion beam about the axis formed by the normal to the surface may be made in order to control or alter an etch rate of the substrate, for example by controlling or altering an incidence of the ion beam relative to channels in a lattice of the crystalline substrate.
The resist side wall is preferably at an angle to the surface of the substrate of greater than 70 degrees, and even more preferably greater than 80 degrees. Most preferably, the resist side wall is substantially, perpendicular to the surface of the substrate.
The angle of the resist side wall may be optimised by controlling the steps involved in formation of the layer of resist and the removal of areas of the resist, namely hot plate temperature, pre-exposure development, exposure time, UV light intensity, post exposure baking temperature and development time.
In embodiments where the angle of the step edge is desired to be large, the method of the invention may further comprise the steps of:
orientating the ion beam such that the angle between the axis of incidence of the ion beam and a plane of the resist side wall is minimised, thereby minimising an etch rate of the resist side wall; and
altering the angle between the axis of incidence of the ion beam and the surface in order to control an etch rate of the substrate.
Alternative embodiments, in which the angle of the step edge is desired to be low, may further comprise the steps of:
orientating the ion beam such that the angle between the axis of incidence of the ion beam and a plane of the resist side wall is sufficiently large to cause an etch rate of the resist side wall to be increased; and
altering the angle between the axis of incidence of the ion beam and the surface in order to control an etch rate of the substrate.
During a period of time in which the resist and substrate are exposed to the ion beam, both the substrate and the resist side wall will be etched by the ion beam. Consequently, the resist side wall will gradually recede from the exposed areas of the surface, thereby exposing further areas of the surface to the ion beam. The further areas of the substrate surface will be exposed to the ion beam for a reduced amount of time, and therefore the substrate will be less deeply etched in these areas, forming the step edge of a certain angle.
The angle of the step edge may be controlled in order to obtain predetermined characteristics in a circuit subsequently constructed over the substrate. For example, a high temperature superconductor may later be formed over the substrate, with a Josephson junction being formed over the step edge. By forming a step edge having a predetermined angle, the critical current of the Josephson junction may, to some extent. be selected.
The substrate used in preferred embodiments of the invention is a single crystal MgO (100) substrate.
The step of removing areas of the resist is preferably performed by photolithography.
The resist and substrate are preferably exposed to an argon ion beam.
The method of the first aspect of the invention preferably comprises the preliminary step of:
providing a smooth substrate surface, for example by polishing the surface of the substrate.
The substrate preferably has a surface roughness of less than 0.4 nm.
The method of the first aspect of the invention preferably comprises the subsequent steps of:
removing all of the resist; and
cleaning the surface of the substrate to smoothen irregularities in the surface and to remove any debris that may have been created during previous steps.
A height of the step edge may be influenced by controlling a time for which the surface and resist are exposed to the ion beam.
Preferably, the method of the first aspect of the invention provides a step edge suitable for forming a Josephson junction in a superconducting material, having a single grain boundary at the upper part of the step edge, and a rounded step base.
The superconducting material is preferably YBa
2
Cu
3
O
x
(YBCO), where x has a value of 6 to 7. YBCO is advantageous in the present method because it grows over an MgO substrate such that its c-axis remains substantially perpendicular to the underlying substrate, enabling grain boundaries to be created in the YBCO HTSC layer. Consequently, in cases where a Josephson junction is constructed over the step edge, the critical current of the junction may be controlled by the angle of the step edge, and by the number of misorientation angles that are formed in the step.
REFERENCES:
patent: 4966885 (1990-10-01), Hebard
patent: 5358928 (1994-10-01), Ginley et al.
patent: 0660428 (1995-06-01), None
Doerrer, L. et al., “High Tc thin film Josephson junctions”, Applied Superconductivity, 1 (10-12), 1992, pp. 1665-1673.*
Ramos, J. et al., “YBCO Josephson junctions on directionally ion beam etched MgO substrates”, Appl. Phys. Lett. 63 (15), 1993, pp. 2141 to 2143.*
Derwent Abstract Accession No.: 94-262486/32, SE 9203489, May 20, 1994.
Derwent Abstract Accession No. 95-173951/23, JP 07-094794, Apr. 7, 1995.
D.H.A. Blank et al., “Characterization of Ramp-type YBa2CU3O7Junctions by AFM”, IEEE Transactions on Applied Superconductivity, vol. 7, No. 2, pp. 3323-3326, Jun. 1997.
J. Ramos et al., “YBa2Cu3O7Josephson junctions on directionally ion beam etched MgO substrates”, American Institute of Physics, pp. 2141-2143, Oct. 1993.
L. Doerrer et al., “High T Thin Film Josephsone Junctions and DC-SQUIDs”, Applied Superconductivity, vol. 1, No. 10-12, pp. 1665-1673, 1993.
Baker & Botts LLP
Christianson Keith
Commonwealth Scientific and Industrial Research Organisation
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