Method of fabrication of stacked semiconductor devices

Details Method of fabrication of stacked semiconductor devices Method of fabrication of stacked semiconductor devices

2006-01-24

2006-01-24

Chambliss, Alonzo (Department: 2814)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Substrate dicing

C438S113000, C438S458000, C438S460000, C257S777000

Reexamination Certificate

active

06989285

ABSTRACT:
A method for increasing integrated circuit density is disclosed comprising stacking an upper wafer and a lower wafer, each of which having fabricated circuitry in specific areas on their respective face surfaces. The upper wafer is attached back-to-back with the lower wafer with a layer of adhesive applied over the back side of the lower wafer. The wafers are aligned so as to bring complementary circuitry on each of the wafers into perpendicular alignment. The adhered wafer pair is then itself attached to an adhesive film to immobilize the wafer during dicing. The adhered wafer pair may be diced into individual die pairs or wafer portions containing more than one die pair.

REFERENCES:
patent: 4264917 (1981-04-01), Ugon
patent: 4266334 (1981-05-01), Edwards et al.
patent: 4472875 (1984-09-01), Christian et al.
patent: 4826787 (1989-05-01), Muto et al.
patent: 4862245 (1989-08-01), Pashby et al.
patent: 5012323 (1991-04-01), Farnworth
patent: 5019943 (1991-05-01), Fassbender et al.
patent: 5051865 (1991-09-01), Kato
patent: 5104820 (1992-04-01), Go et al.
patent: 5146308 (1992-09-01), Chance et al.
patent: 5147815 (1992-09-01), Casto
patent: 5229647 (1993-07-01), Gnadinger
patent: 5239198 (1993-08-01), Lin et al.
patent: 5252857 (1993-10-01), Kane et al.
patent: 5266833 (1993-11-01), Capps
patent: 5291061 (1994-03-01), Ball
patent: 5323060 (1994-06-01), Fogal et al.
patent: 5331235 (1994-07-01), Chun
patent: 5387551 (1995-02-01), Mizoguchi et al.
patent: 5399898 (1995-03-01), Rostoker
patent: 5422435 (1995-06-01), Takiar et al.
patent: 5426072 (1995-06-01), Finnila
patent: 5432681 (1995-07-01), Linderman
patent: 5438224 (1995-08-01), Papageorge et al.
patent: 5466634 (1995-11-01), Beilstein, Jr. et al.
patent: 5471369 (1995-11-01), Honda et al.
patent: 5483024 (1996-01-01), Russell et al.
patent: 5484959 (1996-01-01), Burns
patent: 5495398 (1996-02-01), Takiar et al.
patent: 5547906 (1996-08-01), Badehi
patent: 5567654 (1996-10-01), Beilstein, Jr. et al.
patent: 5656553 (1997-08-01), Leas et al.
patent: 5675180 (1997-10-01), Pedersen et al.
patent: 5786237 (1998-07-01), Cockerill
patent: 5851845 (1998-12-01), Wood et al.
patent: 5917242 (1999-06-01), Ball
patent: 5927993 (1999-07-01), Lesk et al.
patent: 5952725 (1999-09-01), Ball
patent: 6165815 (2000-12-01), Ball
patent: 6337227 (2002-01-01), Ball
patent: 6380630 (2002-04-01), Kinsman
patent: 6784023 (2004-08-01), Ball
patent: 56-62351 (1981-05-01), None
patent: 62-126661 (1987-06-01), None
patent: 63-104343 (1988-05-01), None
patent: 63-179537 (1988-07-01), None
patent: 64-28856 (1989-01-01), None
patent: 01-303730 (1989-12-01), None
patent: 1-158083 (1991-01-01), None
patent: 3-169062 (1991-07-01), None
patent: 03-255657 (1991-11-01), None
patent: 04-76946 (1992-03-01), None
patent: 6-177323 (1994-06-01), None
IBM Technical Disclosure Bulletin, P.F. Iafrate, High Density and Speed Performance Chip Joining Procedure and Package, vol. 15, No. 4, p. 1281.

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