Method of fabrication of stacked semiconductor devices

Details Method of fabrication of stacked semiconductor devices Method of fabrication of stacked semiconductor devices

2008-05-13

2008-05-13

Chambliss, Alonzo (Department: 2814)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S458000, C438S460000, C257S777000, C257S784000

Reexamination Certificate

active

07371612

ABSTRACT:
A method for increasing integrated circuit density is disclosed comprising stacking an upper wafer and a lower wafer, each of which having fabricated circuitry in specific areas on their respective face surfaces. The upper wafer is attached back-to-back with the lower wafer with a layer of adhesive applied over the back side of the lower wafer. The wafers are aligned so as to bring complementary circuitry on each of the wafers into perpendicular alignment. The adhered wafer pair is then itself attached to an adhesive film to immobilize the wafer during dicing. The adhered wafer pair may be diced into individual die pairs or wafer portions containing more than one die pair.

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IBM Technical Disclosure Bulletin, P.F. Iafrate, High Density and Speed Performance Chip Joining Procedure and Package, vol. 15, No. 4, p. 1281.

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