Fishing – trapping – and vermin destroying
Patent
1993-03-08
1996-10-01
Thomas, Tom
Fishing, trapping, and vermin destroying
148DIG50, H01L 2176
Patent
active
055610781
ABSTRACT:
A method of fabricating a semiconductor device incorporates the steps of forming in succession a gate insulting film, a polycrystalline silicon film and a first insulating film on a semiconductor substrate surface, and etching a portion of the first insulating film, the polycrystalline silicon film and the gate insulating film to expose the semiconductor substrate. The exposed semiconductor substrate is etched to form a trench. The trench is then buried by depositing a second insulating film and thereafter a third insulating film. The second and third insulating films are then etched with the third insulating film being etched at a higher rate than the second insulating film. The polycrystalline silicon film is used as a stopper to leave behind the second and third insulating films in the trench. A fourth insulating film is deposited, and then etched again using the polycrystalline silicon film as a stopper. The side walls of the trench are thus coated with the fourth insulating film. Lastly, a gate electrode is formed by depositing a conductive film and selectively removing the conductive film and the polycrystalline silicon film.
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patent: 4740480 (1988-04-01), Ooka
patent: 5229316 (1993-07-01), Lee et al.
patent: 5231046 (1993-03-01), Tasaka
patent: 5234861 (1993-08-01), Roisen et al.
IBM Technical Disclosure Bulletin, vol. 32, No. 10A Mar. 1990 p.90.
Wolf, Silican Processing for the VLSI vol. 2--Processing Integration pp. 208-214, Lattice Press 1986.
Mulpuri S.
NEC Corporation
Thomas Tom
LandOfFree
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