Method of fabrication of MOSFET device with buried bit line

Details Method of fabrication of MOSFET device with buried bit line Method of fabrication of MOSFET device with buried bit line

1993-04-02

1995-08-01

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 47, 437 60, 437919, H01L 2700, H01L 2170

Patent

active

054380090

ABSTRACT:
A doped FET DRAM includes a silicon substrate, with a buried bit line in the silicon substrate. A plug extends down through the substrate to the bit line. A source region and a drain region are positioned above the plug in the substrate with one thereof connected to the plug with a layer of gate oxide above the source region and drain region. A gate above the gate oxide is juxtaposed with the source region and drain region. The source is connected to a capacitor formed of two layers of polysilicon separated by a dielectric of an ONO oxide layer.

REFERENCES:
patent: 4704368 (1987-11-01), Goth et al.
patent: 4999811 (1991-03-01), Banerjee
patent: 5101257 (1992-03-01), Hayden et al.
patent: 5290726 (1994-03-01), Kim

Affiliated with

Also associated with

Rating

Method of fabrication of MOSFET device with buried bit line does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabrication of MOSFET device with buried bit line, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabrication of MOSFET device with buried bit line will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-733594