Method of fabrication of monolithic integrated circuit structure

Details Method of fabrication of monolithic integrated circuit structure Method of fabrication of monolithic integrated circuit structure

1982-04-23

1985-02-12

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29580, 29576B, 148187, H01L 21265

Patent

active

044982232

ABSTRACT:
A body of silicon has sectors of N-type and P-type covered by silicon oxide gate layers with adjacent regions covered by a thicker silicon oxide field layer. Gate members of N-type polycrystalline silicon are placed on the gate layers to define an N-type channel region in the N-type sector and a P-type channel region is the P-type sector. P-type conductivity imparting material is introduced into the remaining regions of the N-type sector to convert them to P-type source/drain regions with an intervening N-type channel region, and N-type conductivity imparting material is introduced into the remaining regions of the P-type sector to convert them to N-type source/drain regions with an intervening P-type channel region. The exposed silicon oxide is grown to a thicker field layer and a protective oxide is formed on the polycrystalline gate members. The source/drain regions are exposed and adherent contact members of polycrystalline silicon of N and P-type are formed in ohmic contact with the source/drain regions of N and P-type, respectively. The surfaces of the polycrystalline contact members are metallized thereby shorting out rectifying junctions between N and P-type contact members.

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patent: 4385433 (1983-05-01), Ozawa
patent: 4420344 (1983-12-01), Davies
patent: 4425700 (1984-01-01), Sasaki et al.
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